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authorWolfgang Denk2011-04-30 22:45:55 +0200
committerWolfgang Denk2011-04-30 22:45:55 +0200
commitaeabdeb7a33c9cff9ae0cd804521d0d691a7c341 (patch)
tree2979428a02f5eebf256d18a3fb5839e063c3354a /board/freescale/common/ngpixis.c
parentf3c615b8abc098f5222b061b81c75f1363ff4d32 (diff)
parenta2879634c430df3d308f4a3badb37cddca0328f5 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/freescale/common/ngpixis.c')
-rw-r--r--board/freescale/common/ngpixis.c58
1 files changed, 58 insertions, 0 deletions
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 4e01e5a0a2e..765f0359bfb 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -119,11 +119,50 @@ void __set_altbank(void)
}
void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
+#ifdef DEBUG
+static void pixis_dump_regs(void)
+{
+ unsigned int i;
+
+ printf("id=%02x\n", PIXIS_READ(id));
+ printf("arch=%02x\n", PIXIS_READ(arch));
+ printf("scver=%02x\n", PIXIS_READ(scver));
+ printf("csr=%02x\n", PIXIS_READ(csr));
+ printf("rst=%02x\n", PIXIS_READ(rst));
+ printf("aux=%02x\n", PIXIS_READ(aux));
+ printf("spd=%02x\n", PIXIS_READ(spd));
+ printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0));
+ printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1));
+ printf("addr=%02x\n", PIXIS_READ(addr));
+ printf("data=%02x\n", PIXIS_READ(data));
+ printf("led=%02x\n", PIXIS_READ(led));
+ printf("vctl=%02x\n", PIXIS_READ(vctl));
+ printf("vstat=%02x\n", PIXIS_READ(vstat));
+ printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0));
+ printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr));
+ printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg));
+ printf("gmdbg=%02x\n", PIXIS_READ(gmdbg));
+ printf("sclk=%02x%02x%02x\n",
+ PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
+ printf("dclk=%02x%02x%02x\n",
+ PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
+ printf("watch=%02x\n", PIXIS_READ(watch));
+
+ for (i = 0; i < 8; i++) {
+ printf("SW%u=%02x/%02x ", i + 1,
+ PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
+ }
+ putc('\n');
+}
+#endif
int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
unsigned int i;
char *p_altbank = NULL;
+#ifdef DEBUG
+ char *p_dump = NULL;
+#endif
char *unknown_param = NULL;
/* No args is a simple reset request.
@@ -137,6 +176,13 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
continue;
}
+#ifdef DEBUG
+ if (strcmp(argv[i], "dump") == 0) {
+ p_dump = argv[i];
+ continue;
+ }
+#endif
+
unknown_param = argv[i];
}
@@ -145,6 +191,15 @@ int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
return 1;
}
+#ifdef DEBUG
+ if (p_dump) {
+ pixis_dump_regs();
+
+ /* 'dump' ignores other commands */
+ return 0;
+ }
+#endif
+
if (p_altbank)
set_altbank();
else
@@ -161,4 +216,7 @@ U_BOOT_CMD(
"Reset the board using the FPGA sequencer",
"- hard reset to default bank\n"
"pixis_reset altbank - reset to alternate bank\n"
+#ifdef DEBUG
+ "pixis_reset dump - display the PIXIS registers\n"
+#endif
);