diff options
author | Ye.Li | 2014-11-06 16:28:59 +0800 |
---|---|---|
committer | Stefano Babic | 2014-11-20 10:50:20 +0100 |
commit | 5051ff5fb0ad44fae480f6af9f2c501f10dd065d (patch) | |
tree | f26f34c19b9c467500d10209bdeeeb42e6ce5211 /board/freescale/common/pfuze.c | |
parent | 36523e9b0a17c2ea12b998e57ee3b3591ed719b3 (diff) |
imx: mx6sabre common: Factorize the Pfuze init function
Since the Pfuze initializations are similar on various mx6 SABRE
boards. Factorize the initialization to a common function in file
board/freescale/common/pfuze.c. So that all SABRE boards BSP can
share the function.
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'board/freescale/common/pfuze.c')
-rw-r--r-- | board/freescale/common/pfuze.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c new file mode 100644 index 00000000000..2cd17944298 --- /dev/null +++ b/board/freescale/common/pfuze.c @@ -0,0 +1,54 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <power/pmic.h> +#include <power/pfuze100_pmic.h> + +struct pmic *pfuze_common_init(unsigned char i2cbus) +{ + struct pmic *p; + int ret; + unsigned int reg; + + ret = power_pfuze100_init(i2cbus); + if (ret) + return NULL; + + p = pmic_get("PFUZE100"); + ret = pmic_probe(p); + if (ret) + return NULL; + + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + + /* Set SW1AB stanby volage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®); + reg &= ~SW1x_STBY_MASK; + reg |= SW1x_0_975V; + pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg); + + /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PUZE_100_SW1ABCONF, ®); + reg &= ~SW1xCONF_DVSSPEED_MASK; + reg |= SW1xCONF_DVSSPEED_4US; + pmic_reg_write(p, PUZE_100_SW1ABCONF, reg); + + /* Set SW1C standby voltage to 0.975V */ + pmic_reg_read(p, PFUZE100_SW1CSTBY, ®); + reg &= ~SW1x_STBY_MASK; + reg |= SW1x_0_975V; + pmic_reg_write(p, PFUZE100_SW1CSTBY, reg); + + /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ + pmic_reg_read(p, PFUZE100_SW1CCONF, ®); + reg &= ~SW1xCONF_DVSSPEED_MASK; + reg |= SW1xCONF_DVSSPEED_4US; + pmic_reg_write(p, PFUZE100_SW1CCONF, reg); + + return p; +} |