diff options
| author | Shengzhou Liu | 2016-04-07 16:22:21 +0800 |
|---|---|---|
| committer | York Sun | 2016-05-17 09:26:19 -0700 |
| commit | 074596c0b5f4e9a3642a3159a9fc7f8b8064c18a (patch) | |
| tree | 645933dc5c430f57d2c27ce98af98329d02852e0 /board/freescale/ls1043ardb | |
| parent | aeaec0e682f45b9e0c62c522fafea353931f73ed (diff) | |
armv8/ls1043: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1043ardb')
| -rw-r--r-- | board/freescale/ls1043ardb/ddr.c | 2 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/ddr.h | 3 | ||||
| -rw-r--r-- | board/freescale/ls1043ardb/ls1043ardb.c | 8 |
3 files changed, 5 insertions, 8 deletions
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index 11bc0f24d9a..1e2fd2ed0c1 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -177,6 +177,8 @@ phys_size_t initdram(int board_type) #else dram_size = fsl_ddr_sdram_size(); #endif + erratum_a008850_post(); + #ifdef CONFIG_FSL_DEEP_SLEEP fsl_dp_ddr_restore(); #endif diff --git a/board/freescale/ls1043ardb/ddr.h b/board/freescale/ls1043ardb/ddr.h index b17eb808853..8ca166b3ac9 100644 --- a/board/freescale/ls1043ardb/ddr.h +++ b/board/freescale/ls1043ardb/ddr.h @@ -6,6 +6,9 @@ #ifndef __DDR_H__ #define __DDR_H__ + +extern void erratum_a008850_post(void); + struct board_specific_parameters { u32 n_ranks; u32 datarate_mhz_high; diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index ec5fdbfe27e..8d8013515a9 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -83,14 +83,6 @@ int board_early_init_f(void) int board_init(void) { - struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; - - /* - * Set CCI-400 control override register to enable barrier - * transaction - */ - out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); - #ifdef CONFIG_FSL_IFC init_final_memctl_regs(); #endif |