diff options
| author | Kumar Gala | 2009-09-02 09:03:08 -0500 |
|---|---|---|
| committer | Kumar Gala | 2009-09-08 09:10:07 -0500 |
| commit | 3e7b6c1f2db5ec31f9e7dbc3e0cbca602167a46a (patch) | |
| tree | a10000c36ecf3385327c86e27955a74718e67680 /board/freescale/mpc8544ds/mpc8544ds.c | |
| parent | 5052a771cf1722c37c732f3c340775b55fbe3a22 (diff) | |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.
Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8544ds/mpc8544ds.c')
| -rw-r--r-- | board/freescale/mpc8544ds/mpc8544ds.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 5a47d0a008e..244a197049c 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -125,8 +125,8 @@ pci_init_board(void) { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; struct pci_controller *hose = &pcie3_hose; - int pcie_ep = (host_agent == 1); - int pcie_configured = io_sel >= 6; + int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent); + int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ @@ -188,8 +188,8 @@ pci_init_board(void) { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; struct pci_controller *hose = &pcie1_hose; - int pcie_ep = (host_agent == 5); - int pcie_configured = io_sel >= 2; + int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); + int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ @@ -246,8 +246,8 @@ pci_init_board(void) { volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; struct pci_controller *hose = &pcie2_hose; - int pcie_ep = (host_agent == 3); - int pcie_configured = io_sel >= 4; + int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); + int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); struct pci_region *r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ @@ -306,7 +306,7 @@ pci_init_board(void) struct pci_controller *hose = &pci1_hose; struct pci_region *r = hose->regions; - uint pci_agent = (host_agent == 6); + uint pci_agent = is_fsl_pci_agent(LAW_TRGT_IF_PCI, host_agent); uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */ uint pci_32 = 1; uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */ |