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authorKumar Gala2009-07-14 22:42:01 -0500
committerKumar Gala2009-07-22 09:42:22 -0500
commit6bb5b412291177e6edd42f9a80e5c5afe57a6a0f (patch)
treee76ab269e5a3d402a738ad8b9716282bf2103a86 /board/freescale/p2020ds
parent9af9c6bdc16da53772c56b1a79c2c91701fe94e6 (diff)
85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of swizzling the upper address bits of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/p2020ds')
-rw-r--r--board/freescale/p2020ds/p2020ds.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 293e5a42dc0..fdd8325544c 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -47,14 +47,31 @@ phys_size_t fixed_sdram(void);
int checkboard(void)
{
+ u8 sw7;
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
+
puts("Board: P2020DS ");
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
+
printf("Sys ID: 0x%02x, "
- "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
- in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
- in8(PIXIS_BASE + PIXIS_PVER));
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+ in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+ in_8(pixis_base + PIXIS_PVER));
+
+ sw7 = in_8(pixis_base + PIXIS_SW(7));
+ switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) {
+ case 0:
+ case 1:
+ printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4));
+ break;
+ case 2:
+ case 3:
+ puts ("Promjet\n");
+ break;
+ }
+
return 0;
}