diff options
| author | Shengzhou Liu | 2014-12-17 16:51:08 +0800 |
|---|---|---|
| committer | York Sun | 2015-01-16 09:31:20 -0800 |
| commit | e26416a3f1631b906776a4e965313b3269faf259 (patch) | |
| tree | 306c0d29a36c15140e64dd7e458f84555e313f78 /board/freescale/t102xrdb/cpld.h | |
| parent | f49b8c1b5d9db6d349000b25312c672a1f6627b8 (diff) | |
powerpc/t1024rdb: Add support for T1024RDB-PB
T1024RDB-PB board adds 2.5G SGMII support with AQR105 PHY.
rcw_0x095 is used for 10G XFI + 3x PCIex1
rcw_0x135 is used for 2.5G SGMII + 2x PCIex1
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t102xrdb/cpld.h')
| -rw-r--r-- | board/freescale/t102xrdb/cpld.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/t102xrdb/cpld.h b/board/freescale/t102xrdb/cpld.h index 5a3100f6070..db50f818fbb 100644 --- a/board/freescale/t102xrdb/cpld.h +++ b/board/freescale/t102xrdb/cpld.h @@ -43,3 +43,7 @@ void cpld_write(unsigned int reg, u8 value); #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 #define CPLD_BOOT_SEL 0x80 + +#define CPLD_PCIE_SGMII_MUX 0x80 +#define CPLD_OVERRIDE_BOOT_EN 0x01 +#define CPLD_OVERRIDE_MUX_EN 0x02 /* PCIE/2.5G-SGMII mux override enable */ |