arm: highbank: Enable OF_CONTROL

All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:

Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 906bd9b6dda..2e2300a307f 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -119,6 +119,16 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
 }
 #endif
 
+void *board_fdt_blob_setup(void)
+{
+	/*
+	 * The ECME management processor loads the DTB from NOR flash
+	 * into DRAM (at 4KB), where it gets patched to contain the
+	 * detected memory size.
+	 */
+	return (void *)0x1000;
+}
+
 static int is_highbank(void)
 {
 	uint32_t midr;