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authorValentin Longchamp2014-08-19 15:40:04 +0200
committerYork Sun2014-08-20 10:44:42 -0700
commitf38391793f1a5c62d1c72a647f15a88e7c22ef11 (patch)
tree47470cb9fd7fa5ecd77f601429ea770779e9290a /board/keymile
parent8af353bb0efa3152396ecca99ba9e91633bdb8a0 (diff)
kmp204x: reset the Zarlink clocking chips at power up only
There is the requirement on the chassis's backplane that when the clocks have been enabled, they then should not disappear. Resetting the Zarlink clocking chips at unit reset violates this requirement because the backplane clocks are not supplied during the reset time. To avoid this side effect, both the Zarlink clocking chips are reset only at power up. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Diffstat (limited to 'board/keymile')
-rw-r--r--board/keymile/kmp204x/kmp204x.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index cd083795b86..4a736137e3f 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -108,8 +108,8 @@ int board_early_init_f(void)
/* and enable WD on it */
qrio_wdmask(BFTIC4_RST, true);
- /* set the ZL30138's prstcfg to reset at power-up and unit reset only */
- qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_UNIT_RST);
+ /* set the ZL30138's prstcfg to reset at power-up only */
+ qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
/* and take it out of reset as soon as possible (needed for Hooper) */
qrio_prst(ZL30158_RST, false, false);
@@ -158,8 +158,8 @@ int misc_init_f(void)
qrio_prstcfg(ETH_FRONT_PHY_RST, PRSTCFG_POWUP_UNIT_CORE_RST);
qrio_prst(ETH_FRONT_PHY_RST, false, false);
- /* set the ZL30343 prstcfg to reset at power-up and unit reset only */
- qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_UNIT_RST);
+ /* set the ZL30343 prstcfg to reset at power-up only */
+ qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
/* and enable the WD on it */
qrio_wdmask(ZL30343_RST, true);