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authorMarek Vasut2023-03-06 15:53:53 +0100
committerStefano Babic2023-03-30 13:51:33 +0200
commit599474120a089924aaa502b701600b2fe4b6270c (patch)
tree39700fc6ed88f636f901847b6c163ddc64065d04 /board/msc/sm2s_imx8mp
parentc7ea9612df0f89613a37ebe44ee2f48afc3493d3 (diff)
arm64: imx8mp: Drop EQoS GPR[1] board workaround
The EQoS interface mode is now configured in common board_interface_eth_init() and called by EQoS MAC driver when appropriate. Drop the board side duplicates if the same functionality. Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'board/msc/sm2s_imx8mp')
-rw-r--r--board/msc/sm2s_imx8mp/sm2s_imx8mp.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
index 3913c4f2427..6ccbf02db06 100644
--- a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
+++ b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
@@ -30,19 +30,6 @@ static void setup_fec(void)
setbits_le32(&gpr->gpr[1], BIT(22));
}
-static int setup_eqos(void)
-{
- struct iomuxc_gpr_base_regs *gpr =
- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
-
- /* set INTF as RGMII, enable RGMII TXC clock */
- clrsetbits_le32(&gpr->gpr[1],
- IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));
- setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21));
-
- return set_clk_eqos(ENET_125MHZ);
-}
-
int board_phy_config(struct phy_device *phydev)
{
if (phydev->drv->config)
@@ -54,7 +41,5 @@ int board_init(void)
{
setup_fec();
- setup_eqos();
-
return 0;
}