diff options
| author | Simon Glass | 2012-01-11 12:42:27 +0000 |
|---|---|---|
| committer | Albert ARIBAUD | 2012-02-12 10:11:22 +0100 |
| commit | e712e5451867e67f7e35aa4a931997e084b5b622 (patch) | |
| tree | 4784cd6f5446e1cc0fec680daac8fe225eb9c352 /board/nvidia/harmony | |
| parent | f448302167eda3549c173c7eee9c4c3bccf2baa0 (diff) | |
tegra: Use funcmux for MMC on harmony
Use the new funcmux_select() feature to set up the MMC pin mux.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/harmony')
| -rw-r--r-- | board/nvidia/harmony/harmony.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index d5e147d2694..8f8e7bf3fe5 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -24,6 +24,8 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/tegra2.h> +#include <asm/arch/clock.h> +#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/mmc.h> #include <asm/gpio.h> @@ -46,27 +48,14 @@ void gpio_config_uart(void) */ static void pin_mux_mmc(void) { - /* SDMMC4: config 3, x8 on 2nd set of pins */ - pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATB); - pinmux_tristate_disable(PINGRP_GMA); - pinmux_tristate_disable(PINGRP_GME); + funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); + funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); /* For power GPIO PI6 */ pinmux_tristate_disable(PINGRP_ATA); /* For CD GPIO PH2 */ pinmux_tristate_disable(PINGRP_ATD); - /* SDMMC2: SDIO2_CLK, SDIO2_CMD, SDIO2_DAT[7:0] */ - pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); - pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); - - pinmux_tristate_disable(PINGRP_DTA); - pinmux_tristate_disable(PINGRP_DTD); - /* For power GPIO PT3 */ pinmux_tristate_disable(PINGRP_DTB); /* For CD GPIO PI5 */ |