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authorTom Rini2014-10-27 09:05:43 -0400
committerTom Rini2014-10-27 09:05:43 -0400
commit5aa7bece1045c28806ce919099616ebe8fa63325 (patch)
treec19240d9c85e3f4f839596e5197c619d872021be /board/overo
parent674ca84d11391cd2e7faf8f638fc25ed4b782a91 (diff)
parentb5ff205cdb0da6eff8a02653bf5192ea8d661faa (diff)
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'board/overo')
-rw-r--r--board/overo/overo.c137
-rw-r--r--board/overo/overo.h150
2 files changed, 183 insertions, 104 deletions
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 7506820e349..dfb8602bafc 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -27,12 +27,19 @@
#include <asm/mach-types.h>
#include "overo.h"
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
#define TWL4030_I2C_BUS 0
#define EXPANSION_EEPROM_I2C_BUS 2
#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
+#define GUMSTIX_EMPTY_EEPROM 0x0
+
#define GUMSTIX_SUMMIT 0x01000200
#define GUMSTIX_TOBI 0x02000200
#define GUMSTIX_TOBI_DUO 0x03000200
@@ -58,22 +65,7 @@ static struct {
char fab_revision[8];
char env_var[16];
char env_setting[64];
-} expansion_config;
-
-#if defined(CONFIG_CMD_NET)
-static void setup_net_chip(void);
-#endif
-
-/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
-static const u32 gpmc_lan_config[] = {
- NET_LAN9221_GPMC_CONFIG1,
- NET_LAN9221_GPMC_CONFIG2,
- NET_LAN9221_GPMC_CONFIG3,
- NET_LAN9221_GPMC_CONFIG4,
- NET_LAN9221_GPMC_CONFIG5,
- NET_LAN9221_GPMC_CONFIG6,
- /*CONFIG7- computed as params */
-};
+} expansion_config = {0x0};
static const struct ns16550_platdata overo_serial = {
OMAP34XX_UART3,
@@ -226,6 +218,9 @@ int get_sdio2_config(void)
*/
unsigned int get_expansion_id(void)
{
+ if (expansion_config.device_vendor != 0x0)
+ return expansion_config.device_vendor;
+
i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
@@ -254,10 +249,6 @@ int misc_init_r(void)
twl4030_power_init();
twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
-#if defined(CONFIG_CMD_NET)
- setup_net_chip();
-#endif
-
printf("Board revision: %d\n", get_board_revision());
switch (get_sdio2_config()) {
@@ -279,6 +270,7 @@ int misc_init_r(void)
printf("Recognized Summit expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "dvi");
setenv("expansionname", "summit");
break;
@@ -286,6 +278,7 @@ int misc_init_r(void)
printf("Recognized Tobi expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "dvi");
setenv("expansionname", "tobi");
break;
@@ -293,20 +286,20 @@ int misc_init_r(void)
printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
- /* second lan chip */
- enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
- 0x2B000000, GPMC_SIZE_16M);
+ MUX_GUMSTIX();
break;
case GUMSTIX_PALO35:
printf("Recognized Palo35 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "lcd35");
break;
case GUMSTIX_PALO43:
printf("Recognized Palo43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "lcd43");
setenv("expansionname", "palo43");
break;
@@ -314,6 +307,7 @@ int misc_init_r(void)
printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "lcd43");
setenv("expansionname", "chestnut43");
break;
@@ -321,11 +315,13 @@ int misc_init_r(void)
printf("Recognized Pinto expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
break;
case GUMSTIX_GALLOP43:
printf("Recognized Gallop43 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
setenv("defaultdisplay", "lcd43");
setenv("expansionname", "gallop43");
break;
@@ -333,6 +329,7 @@ int misc_init_r(void)
printf("Recognized Alto35 expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
MUX_ALTO35();
setenv("defaultdisplay", "lcd35");
setenv("expansionname", "alto35");
@@ -341,21 +338,25 @@ int misc_init_r(void)
printf("Recognized Stagecoach expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
break;
case GUMSTIX_THUMBO:
printf("Recognized Thumbo expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
break;
case GUMSTIX_TURTLECORE:
printf("Recognized Turtlecore expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
break;
case GUMSTIX_ARBOR43C:
printf("Recognized Arbor43C expansion board (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
MUX_ARBOR43C();
setenv("defaultdisplay", "lcd43");
break;
@@ -363,16 +364,17 @@ int misc_init_r(void)
printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
expansion_config.revision,
expansion_config.fab_revision);
+ MUX_GUMSTIX();
MUX_USRP_E();
setenv("defaultdisplay", "dvi");
break;
case GUMSTIX_NO_EEPROM:
- puts("No EEPROM on expansion board\n");
+ case GUMSTIX_EMPTY_EEPROM:
+ puts("No or empty EEPROM on expansion board\n");
+ MUX_GUMSTIX();
setenv("expansionname", "tobi");
break;
default:
- if (expansion_id == 0x0)
- setenv("expansionname", "tobi");
printf("Unrecognized expansion board 0x%08x\n", expansion_id);
break;
}
@@ -401,7 +403,18 @@ void set_muxconf_regs(void)
MUX_OVERO();
}
-#if defined(CONFIG_CMD_NET)
+#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SPL_BUILD)
+/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
+static const u32 gpmc_lan_config[] = {
+ NET_LAN9221_GPMC_CONFIG1,
+ NET_LAN9221_GPMC_CONFIG2,
+ NET_LAN9221_GPMC_CONFIG3,
+ NET_LAN9221_GPMC_CONFIG4,
+ NET_LAN9221_GPMC_CONFIG5,
+ NET_LAN9221_GPMC_CONFIG6,
+ /*CONFIG7- computed as params */
+};
+
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
@@ -411,10 +424,6 @@ static void setup_net_chip(void)
{
struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
- /* first lan chip */
- enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
- GPMC_SIZE_16M);
-
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
@@ -422,7 +431,14 @@ static void setup_net_chip(void)
/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
&ctrl_base->gpmc_nadv_ale);
+}
+/*
+ * Routine: reset_net_chip
+ * Description: Reset the Ethernet hardware.
+ */
+static void reset_net_chip(void)
+{
/* Make GPIO 64 as output pin and send a magic pulse through it */
if (!gpio_request(64, "")) {
gpio_direction_output(64, 0);
@@ -433,16 +449,42 @@ static void setup_net_chip(void)
gpio_set_value(64, 1);
}
}
-#endif
int board_eth_init(bd_t *bis)
{
+ unsigned int expansion_id;
int rc = 0;
+
#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+ expansion_id = get_expansion_id();
+ switch (expansion_id) {
+ case GUMSTIX_TOBI_DUO:
+ /* second lan chip */
+ enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
+ 0x2B000000, GPMC_SIZE_16M);
+ /* no break */
+ case GUMSTIX_TOBI:
+ case GUMSTIX_CHESTNUT43:
+ case GUMSTIX_STAGECOACH:
+ case GUMSTIX_NO_EEPROM:
+ case GUMSTIX_EMPTY_EEPROM:
+ /* first lan chip */
+ enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
+ 0x2C000000, GPMC_SIZE_16M);
+
+ setup_net_chip();
+ reset_net_chip();
+
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+ break;
+ default:
+ break;
+ }
#endif
+
return rc;
}
+#endif
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
@@ -450,3 +492,32 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
+
+#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+#define GUMSTIX_GPIO_USBH_CPEN 168
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ /* Enable USB power */
+ if (!gpio_request(GUMSTIX_GPIO_USBH_CPEN, "usbh_cpen"))
+ gpio_direction_output(GUMSTIX_GPIO_USBH_CPEN, 1);
+
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(void)
+{
+ /* Disable USB power */
+ gpio_set_value(GUMSTIX_GPIO_USBH_CPEN, 0);
+ gpio_free(GUMSTIX_GPIO_USBH_CPEN);
+
+ return omap_ehci_hcd_stop();
+}
+
+#endif /* CONFIG_USB_EHCI */
diff --git a/board/overo/overo.h b/board/overo/overo.h
index 57725d867f2..d0edf86365a 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -101,13 +101,9 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\
MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\
MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /*GPMC_nCS0*/\
- MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)) /*GPMC_nCS2*/\
MUX_VAL(CP(GPMC_NCS3), (IEN | PTU | EN | M4)) /*GPIO_54*/\
/* - MMC1_WP*/\
- MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\
- MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
- MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\
MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)) /*GPMC_nCS7*/\
MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /*GPMC_nCS3*/\
MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M0)) /*GPMC_CLK*/\
@@ -117,45 +113,11 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /*GPMC_nBE0_CLE*/\
MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\
MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\
- MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
- /* - SMSC911X_NRES*/\
- MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | DIS | M4)) /*GPIO_65*/\
- /*DSS*/\
- MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
- MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
- MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
- MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
- MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
- MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
- MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
- MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
- MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
- MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
- MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
- MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
- MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
- MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
- MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
- MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
- MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
- MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
- MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
- MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
- MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
- MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
- MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
- MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
- MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
- MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
- MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
- MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
/*CAMERA*/\
MUX_VAL(CP(CAM_HS), (IEN | PTU | DIS | M0)) /*CAM_HS */\
MUX_VAL(CP(CAM_VS), (IEN | PTU | DIS | M0)) /*CAM_VS */\
MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) /*CAM_XCLKA*/\
MUX_VAL(CP(CAM_PCLK), (IEN | PTU | DIS | M0)) /*CAM_PCLK*/\
- MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*CAM_FLD*/\
MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) /*CAM_D0*/\
MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) /*CAM_D1*/\
MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) /*CAM_D2*/\
@@ -168,13 +130,8 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) /*CAM_D9*/\
MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) /*CAM_D10*/\
MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) /*CAM_D11*/\
- MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
- MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M0)) /*CAM_WEN*/\
- MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
MUX_VAL(CP(CSI2_DX0), (IEN | PTD | EN | M4)) /*GPIO_112*/\
MUX_VAL(CP(CSI2_DY0), (IEN | PTD | EN | M4)) /*GPIO_113*/\
- MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\
- /* - PEN_DOWN*/\
MUX_VAL(CP(CSI2_DY1), (IEN | PTD | EN | M4)) /*GPIO_115*/\
/*Audio Interface */\
MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\
@@ -208,14 +165,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\
MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\
- MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
- MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\
- MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\
- MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\
- MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
MUX_VAL(CP(UART1_RTS), (IEN | PTU | DIS | M4)) /*GPIO_149*/ \
- MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
- MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*McBSP4_CLKX*/\
MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*McBSP4_DR*/\
MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*McBSP4_DX*/\
@@ -228,7 +178,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) /*McBSP1_FSX*/\
MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) /*McBSP1_CLKX*/\
/*Serial Interface*/\
- MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\
MUX_VAL(CP(UART3_RTS_SD), (IEN | PTU | EN | M4)) /*GPIO_164 W2W_*/\
/* BT_NRESET*/\
MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTU | EN | M0)) /*UART3_RX_IRRX*/\
@@ -255,14 +204,6 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) /*I2C3_SDA*/\
MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) /*I2C4_SCL*/\
MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) /*I2C4_SDA*/\
- MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*HDQ_SIO*/\
- MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
- MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
- MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
- MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
- MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
- MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\
- /* - LAN_INTR */\
MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\
MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\
MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\
@@ -281,21 +222,9 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\
MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\
MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\
- MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | EN | M4)) /*GPIO_10*/\
- MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\
- MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\
- MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\
- MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M4)) /*GPIO_14*/\
MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M4)) /*GPIO_15 - X_GATE*/\
MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | EN | M4)) /*GPIO_16*/\
/* - W2W_NRESET*/\
- MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\
- MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\
- MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\
- MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\
- MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M4)) /*GPIO_21*/\
- MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M4)) /*GPIO_22*/\
- MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M4)) /*GPIO_23*/\
MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DIR*/\
@@ -369,6 +298,85 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
+#define MUX_GUMSTIX() \
+ /*GPMC*/\
+ MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)) /*GPMC_nCS1*/\
+ MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M0)) /*GPMC_nCS4*/\
+ MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)) /*GPMC_nCS5*/\
+ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M0)) /*GPMC_nCS6*/\
+ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M4)) /*GPIO_63*/\
+ /* - CAM_IRQ*/\
+ MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
+ /* - SMSC911X_NRES*/\
+ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | DIS | M4)) /*GPIO_65*/\
+ /*DSS*/\
+ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
+ MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
+ MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
+ MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
+ MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
+ MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
+ MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
+ MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
+ MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
+ MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
+ MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
+ MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
+ MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
+ MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
+ MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
+ MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
+ MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
+ MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
+ MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
+ MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
+ MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
+ MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
+ MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
+ MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
+ MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
+ MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
+ MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
+ MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
+ /*CAMERA*/\
+ MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*CAM_FLD*/\
+ MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) /*CAM_XCLKB*/\
+ MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M0)) /*CAM_WEN*/\
+ MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\
+ MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\
+ /* - PEN_DOWN*/\
+ /*Bluetooth*/\
+ MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\
+ MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\
+ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
+ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
+ MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) /*UART1_RX*/\
+ /*Serial Interface*/\
+ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTD | EN | M0)) /*UART3_CTS_RCTX*/\
+ MUX_VAL(CP(HDQ_SIO), (IDIS | PTU | EN | M4)) /*HDQ_SIO*/\
+ MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) /*McSPI1_CLK*/\
+ MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) /*McSPI1_SIMO */\
+ MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\
+ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\
+ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\
+ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\
+ /* - LAN_INTR */\
+ /*Control and debug */\
+ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTU | EN | M4)) /*GPIO_10*/\
+ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\
+ MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\
+ MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\
+ MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M4)) /*GPIO_14*/\
+ MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\
+ MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\
+ MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\
+ MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\
+ MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M4)) /*GPIO_21*/\
+ MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M4)) /*GPIO_22*/\
+ MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M4)) /*GPIO_23*/\
+
#define MUX_OVERO_SDIO2_DIRECT() \
MUX_VAL(CP(MMC2_CLK), (IEN | PTU | EN | M0)) /*MMC2_CLK*/\
MUX_VAL(CP(MMC2_CMD), (IEN | PTU | EN | M0)) /*MMC2_CMD*/\