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authorTom Rini2021-07-01 08:57:23 -0400
committerTom Rini2021-07-01 08:57:23 -0400
commit6b69f15fd6386770b6fe782a4a8b4ce9243e2327 (patch)
treead79b9e1ef596dd0f0c2b0b878179535545c8d97 /board/ppcag
parent90c2fd2af8189e2e2682c90cd72a48b65191b467 (diff)
parent45576273e9209309238f332c85a6fef955c49b59 (diff)
Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.10 clk: - Add driver for Xilinx Clocking Wizard IP fdt: - Also record architecture in /fit-images net: - Fix plat/priv data handling in axi emac - Add support for 10G/25G speeds pca953x: - Add missing dependency on i2c serial: - Fix dependencies for DEBUG uart for pl010/pl011 - Add setconfig option for cadence serial driver watchdog: - Add cadence wdt expire now function zynq: - Update DT bindings to reflect the latest state and descriptions zynqmp: - Update DT bindings to reflect the latest state and descriptions - SPL: Add support for ECC DRAM initialization - Fix R5 core 1 handling logic - Enable firmware driver for mini configurations - Enable secure boot, regulators, wdt - Add support xck devices and 67dr - Add psu init for sm/smk-k26 SOMs - Add handling for MMC seq number via mmc_get_env_dev() - Handle reserved memory locations - Add support for u-boot.itb generation for secure OS - Handle BL32 handoffs for secure OS - Add support for 64bit addresses for u-boot.its generation - Change eeprom handling via nvmem aliases
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