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authorJean-Christophe PLAGNIOL-VILLARD2008-10-16 15:01:15 +0200
committerWolfgang Denk2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/sc520_cdp/sc520_cdp.c
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/sc520_cdp/sc520_cdp.c')
-rw-r--r--board/sc520_cdp/sc520_cdp.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
index 99debde50ee..779f957d684 100644
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -87,7 +87,7 @@ static void irq_init(void)
write_mmcr_byte(SC520_ICEMAP, SC520_IRQ1); /* Set ICE Debug Serielport INT to IRQ1 */
write_mmcr_byte(SC520_FERRMAP,SC520_IRQ13); /* Set FP error INT to IRQ13 */
- if (CFG_USE_SIO_UART) {
+ if (CONFIG_SYS_USE_SIO_UART) {
write_mmcr_byte(SC520_UART1MAP, SC520_IRQ_DISABLED); /* disable internal UART1 INT */
write_mmcr_byte(SC520_UART2MAP, SC520_IRQ_DISABLED); /* disable internal UART2 INT */
write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ3); /* Set GPIRQ3 (ISA IRQ3) to IRQ3 */
@@ -122,10 +122,10 @@ static void pci_sc520_cdp_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
* when we need one (a board with more pci interrupt pins
* would use a larger table */
static int irq_list[] = {
- CFG_FIRST_PCI_IRQ,
- CFG_SECOND_PCI_IRQ,
- CFG_THIRD_PCI_IRQ,
- CFG_FORTH_PCI_IRQ
+ CONFIG_SYS_FIRST_PCI_IRQ,
+ CONFIG_SYS_SECOND_PCI_IRQ,
+ CONFIG_SYS_THIRD_PCI_IRQ,
+ CONFIG_SYS_FORTH_PCI_IRQ
};
static int next_irq_index=0;
@@ -279,7 +279,7 @@ static void bus_init(void)
asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */
- if (CFG_USE_SIO_UART) {
+ if (CONFIG_SYS_USE_SIO_UART) {
write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) | UART2_DIS|UART1_DIS);
setup_ali_sio(1);
} else {