diff options
| author | Anatolij Gustschin | 2008-08-15 15:42:13 +0200 |
|---|---|---|
| committer | Wolfgang Denk | 2008-09-09 10:14:13 +0200 |
| commit | e64987a892353f3d49eb242d997820ef8f538912 (patch) | |
| tree | 2a8b0440cfcfa3e7c38c0c0c79bc5b5fbb16dcf3 /board/socrates/tlb.c | |
| parent | 3e79b588b5199f35016f178fc0d5d1266382097f (diff) | |
85xx: socrates: Enable Lime support.
This patch adds Lime GDC support together with support for the PWM
backlight control through the w83782d chip. The reset pin of the
latter is attached to GPIO, so we need to reset it in
early_board_init_r.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'board/socrates/tlb.c')
| -rw-r--r-- | board/socrates/tlb.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c index aea99ada20a..d255cea15e5 100644 --- a/board/socrates/tlb.c +++ b/board/socrates/tlb.c @@ -46,7 +46,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* - * TLB 0: 64M Non-cacheable, guarded + * TLB 1: 64M Non-cacheable, guarded * 0xfc000000 64M FLASH * Out of reset this entry is only 4K. */ @@ -81,6 +81,17 @@ struct fsl_e_tlb_entry tlb_table[] = { #endif /* + * TLB 5: 64M Non-cacheable, guarded + * 0xc8000000 16M LIME GDC framebuffer + * 0xc9fc0000 256K LIME GDC MMIO + * (0xcbfc0000 256K LIME GDC MMIO) + * MMIO is relocatable and could be at 0xcbfc0000 + */ + SET_TLB_ENTRY(1, CFG_LIME_BASE, CFG_LIME_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_64M, 1), + + /* * TLB 6: 64M Non-cacheable, guarded * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO |