diff options
author | Patrick Delaunay | 2022-10-11 16:44:26 +0200 |
---|---|---|
committer | Patrice Chotard | 2022-10-18 08:40:59 +0200 |
commit | c37a6684818d41051c54f814863429536aa972be (patch) | |
tree | b4d3ce25274ee7e08b8960e8db07d6ca0707a00c /board/st/stm32mp1/debug_uart.c | |
parent | 637a370251d352ab86a35a8f6ebc7e22e4860adc (diff) |
stm32mp: fix compilation issue with DEBUG_UART
Fix the compilation issue when CONFIG_DEBUG_UART is activated
drivers/serial/serial_stm32.o: in function `debug_uart_init':
drivers/serial/serial_stm32.c:291: undefined reference to \
`board_debug_uart_init'
The board_debug_uart_init is needed for SPL boot, called in
cpu.c::mach_cpu_init(); it is defined in board/st/stm32mp1/spl.c.
But with the removal #ifdefs patch, the function debug_uart_init() is
always compiled even if not present in the final U-Boot image.
This patch adds a file to provided this function when DEBUG_UART and SPL
are activated.
Fixes: c8b2eef52b6c ("stm32mp15: tidy up #ifdefs in cpu.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'board/st/stm32mp1/debug_uart.c')
-rw-r--r-- | board/st/stm32mp1/debug_uart.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/board/st/stm32mp1/debug_uart.c b/board/st/stm32mp1/debug_uart.c new file mode 100644 index 00000000000..24e3f9f2201 --- /dev/null +++ b/board/st/stm32mp1/debug_uart.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + */ + +#include <config.h> +#include <debug_uart.h> +#include <asm/io.h> +#include <asm/arch/stm32.h> +#include <linux/bitops.h> + +#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) +#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) + +#define GPIOG_BASE 0x50008000 + +void board_debug_uart_init(void) +{ + if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) { + /* UART4 clock enable */ + setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); + + /* GPIOG clock enable */ + writel(BIT(6), RCC_MP_AHB4ENSETR); + /* GPIO configuration for ST boards: Uart4 TX = G11 */ + writel(0xffbfffff, GPIOG_BASE + 0x00); + writel(0x00006000, GPIOG_BASE + 0x24); + } +} |