diff options
| author | Chen-Yu Tsai | 2016-11-30 14:57:32 +0800 |
|---|---|---|
| committer | Maxime Ripard | 2017-04-20 13:30:00 +0200 |
| commit | 379febac5a3ea9f1952c2234a9acfd1b16f9100f (patch) | |
| tree | ab2fd8074c65d5244177b549f8c5a99dee03c5eb /board/sunxi/board.c | |
| parent | 301791c9b07425497d170abae6fdcc289340bc6e (diff) | |
sunxi: Add initial support for R40
The R40 is the successor to the A20. It is a hybrid of the A20, A33
and the H3.
The R40's PIO controller is compatible with the A20,
Reuse the A20 UART and I2C muxing code by adding the R40's macro.
The display pipeline is the newer DE 2.0 variant.
Block enabling video on R40 for now.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'board/sunxi/board.c')
| -rw-r--r-- | board/sunxi/board.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e2bba9abdee..4c211802296 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -396,7 +396,10 @@ int board_mmc_init(bd_t *bis) void i2c_init_board(void) { #ifdef CONFIG_I2C0_ENABLE -#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I) +#if defined(CONFIG_MACH_SUN4I) || \ + defined(CONFIG_MACH_SUN5I) || \ + defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_R40) sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0); clock_twi_onoff(0, 1); @@ -412,7 +415,9 @@ void i2c_init_board(void) #endif #ifdef CONFIG_I2C1_ENABLE -#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) +#if defined(CONFIG_MACH_SUN4I) || \ + defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_R40) sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1); sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1); clock_twi_onoff(1, 1); @@ -432,7 +437,9 @@ void i2c_init_board(void) #endif #ifdef CONFIG_I2C2_ENABLE -#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) +#if defined(CONFIG_MACH_SUN4I) || \ + defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_R40) sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2); sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2); clock_twi_onoff(2, 1); @@ -456,7 +463,8 @@ void i2c_init_board(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3); sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3); clock_twi_onoff(3, 1); -#elif defined(CONFIG_MACH_SUN7I) +#elif defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_R40) sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3); sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3); clock_twi_onoff(3, 1); @@ -464,7 +472,8 @@ void i2c_init_board(void) #endif #ifdef CONFIG_I2C4_ENABLE -#if defined(CONFIG_MACH_SUN7I) +#if defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_R40) sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4); sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4); clock_twi_onoff(4, 1); |