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authorAlexey Brodkin2017-03-30 19:18:30 +0300
committerAlexey Brodkin2017-03-31 22:09:36 +0300
commit0b0db98be7e22f5b862b62f63db7ff6ab02a3a7f (patch)
tree1af2ac7d0d128aa87c023a9cc6a879d443d34f73 /board/synopsys/axs10x
parent5cf618ee60a752d058a767372ca1ecb8d9c09b16 (diff)
axs103: Clean-up smp_kick_all_cpus()
* Rely on default pulse polarity value * Don't mess with "multicore" value as it doesn't affect execution In essence we now do a bare minimal stuff: 1) Select HS38x2_1 with CORE_SEL=1 bits 2) Select "manual" core start (via CREG) with START_MODE=0 3) Generate cpu_start pulse with START=1 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'board/synopsys/axs10x')
-rw-r--r--board/synopsys/axs10x/axs10x.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index a5e774b2cf7..57c790220f7 100644
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -61,16 +61,14 @@ void smp_kick_all_cpus(void)
{
/* CPU start CREG */
#define AXC003_CREG_CPU_START 0xF0001400
-
/* Bits positions in CPU start CREG */
#define BITS_START 0
-#define BITS_POLARITY 8
+#define BITS_START_MODE 4
#define BITS_CORE_SEL 9
-#define BITS_MULTICORE 12
-
-#define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \
- (1 << BITS_POLARITY) | (1 << BITS_START)
- writel(CMD, (void __iomem *)AXC003_CREG_CPU_START);
+ int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
+ cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
+ cmd &= ~(1 << BITS_START_MODE);
+ writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);
}
#endif