diff options
| author | Francesco Dolcini | 2021-08-31 11:46:06 +0200 |
|---|---|---|
| committer | Stefano Babic | 2021-10-19 10:51:39 +0200 |
| commit | a591e75fbc16d4b4dd26758fc6d3bdb6bd6551cb (patch) | |
| tree | 646af0176a8343c57026ef8888b5eefbd24ff20f /board/toradex/apalis_imx6 | |
| parent | 1194d1711781fe30bf664c1bf2d559ffa76ccc7e (diff) | |
apalis-imx6: use dynamic DDR calibration
Enable dynamic DDR calibration to have a reliable behavior on edge
temperatures conditions.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Diffstat (limited to 'board/toradex/apalis_imx6')
| -rw-r--r-- | board/toradex/apalis_imx6/apalis_imx6.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index f4cd28d49f9..25a4cd9f38b 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -1076,6 +1076,24 @@ static void ddr_init(int *table, int size) writel(table[2 * i + 1], table[2 * i]); } +/* Perform DDR DRAM calibration */ +static void spl_dram_perform_cal(void) +{ +#ifdef CONFIG_MX6_DDRCAL + int err; + struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize = 2, + }; + + err = mmdc_do_write_level_calibration(&ddr_sysinfo); + if (err) + printf("error %d from write level calibration\n", err); + err = mmdc_do_dqs_calibration(&ddr_sysinfo); + if (err) + printf("error %d from dqs calibration\n", err); +#endif +} + static void spl_dram_init(void) { int minc, maxc; @@ -1094,6 +1112,7 @@ static void spl_dram_init(void) break; }; udelay(100); + spl_dram_perform_cal(); } void board_init_f(ulong dummy) |