diff options
author | Andy Fleming | 2015-11-04 15:48:32 -0600 |
---|---|---|
committer | York Sun | 2015-11-04 15:19:34 -0800 |
commit | 87e29878caba758ed3e09e9912ac8eb6dfc55f39 (patch) | |
tree | d98b04c33498eb2bb30dac21961d1bb32637823c /board/varisys/cyrus/law.c | |
parent | c79e1c1ce9e5c1ddf6fac631e4741999f8a0cc58 (diff) |
mpc85xx: Add support for the Varisys Cyrus board
This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>
Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/varisys/cyrus/law.c')
-rw-r--r-- | board/varisys/cyrus/law.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/board/varisys/cyrus/law.c b/board/varisys/cyrus/law.c new file mode 100644 index 00000000000..91e1d852464 --- /dev/null +++ b/board/varisys/cyrus/law.c @@ -0,0 +1,27 @@ +/* + * Author: Adrian Cox + * Based on corenet_ds law files. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_LBC0_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_LBC1_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), +#ifdef CONFIG_SYS_BMAN_MEM_PHYS + SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN), +#endif +#ifdef CONFIG_SYS_QMAN_MEM_PHYS + SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN), +#endif +#ifdef CONFIG_SYS_DCSRBAR_PHYS + /* Limit DCSR to 32M to access NPC Trace Buffer */ + SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); |