diff options
author | Tom Rini | 2021-05-14 21:34:25 -0400 |
---|---|---|
committer | Tom Rini | 2021-07-07 19:52:24 -0400 |
commit | ed7fe2bee12a464da5b944cc2218d924793b8a80 (patch) | |
tree | df3428c8ac1ddbd99a41722693a68ce368040a33 /board/xes/xpedite517x | |
parent | 66e3c64f2c6bec4739d1d618b3583d5c92f10176 (diff) |
ppc: Remove xpedite boards
These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove them. As this includes
the last ARCH_MPC8572 platform, remove that as well.
Cc: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'board/xes/xpedite517x')
-rw-r--r-- | board/xes/xpedite517x/Kconfig | 12 | ||||
-rw-r--r-- | board/xes/xpedite517x/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/xes/xpedite517x/Makefile | 8 | ||||
-rw-r--r-- | board/xes/xpedite517x/ddr.c | 124 | ||||
-rw-r--r-- | board/xes/xpedite517x/law.c | 27 | ||||
-rw-r--r-- | board/xes/xpedite517x/xpedite517x.c | 86 |
6 files changed, 0 insertions, 263 deletions
diff --git a/board/xes/xpedite517x/Kconfig b/board/xes/xpedite517x/Kconfig deleted file mode 100644 index 91bbd22451b..00000000000 --- a/board/xes/xpedite517x/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_XPEDITE517X - -config SYS_BOARD - default "xpedite517x" - -config SYS_VENDOR - default "xes" - -config SYS_CONFIG_NAME - default "xpedite517x" - -endif diff --git a/board/xes/xpedite517x/MAINTAINERS b/board/xes/xpedite517x/MAINTAINERS deleted file mode 100644 index 26e0acccb05..00000000000 --- a/board/xes/xpedite517x/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -XPEDITE517X BOARD -M: Peter Tyser <ptyser@xes-inc.com> -S: Maintained -F: board/xes/xpedite517x/ -F: include/configs/xpedite517x.h -F: configs/xpedite517x_defconfig diff --git a/board/xes/xpedite517x/Makefile b/board/xes/xpedite517x/Makefile deleted file mode 100644 index 10ac76a37a1..00000000000 --- a/board/xes/xpedite517x/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y += xpedite517x.o -obj-y += ddr.o -obj-y += law.o diff --git a/board/xes/xpedite517x/ddr.c b/board/xes/xpedite517x/ddr.c deleted file mode 100644 index a3fd2fc8ca8..00000000000 --- a/board/xes/xpedite517x/ddr.c +++ /dev/null @@ -1,124 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2009 Extreme Engineering Solutions, Inc. - * Copyright 2007-2008 Freescale Semiconductor, Inc. - */ - -#include <common.h> -#include <i2c.h> -#include <fsl_ddr_sdram.h> -#include <fsl_ddr_dimm_params.h> -#include <log.h> - -void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address) -{ - i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd, - sizeof(ddr2_spd_eeprom_t)); -} - -/* - * There are four board-specific SDRAM timing parameters which must be - * calculated based on the particular PCB artwork. These are: - * 1.) CPO (Read Capture Delay) - * - TIMING_CFG_2 register - * Source: Calculation based on board trace lengths and - * chip-specific internal delays. - * 2.) WR_DATA_DELAY (Write Command to Data Strobe Delay) - * - TIMING_CFG_2 register - * Source: Calculation based on board trace lengths. - * Unless clock and DQ lanes are very different - * lengths (>2"), this should be set to the nominal value - * of 1/2 clock delay. - * 3.) CLK_ADJUST (Clock and Addr/Cmd alignment control) - * - DDR_SDRAM_CLK_CNTL register - * Source: Signal Integrity Simulations - * 4.) 2T Timing on Addr/Ctl - * - TIMING_CFG_2 register - * Source: Signal Integrity Simulations - * Usually only needed with heavy load/very high speed (>DDR2-800) - * - * PCB routing on the XPedite5170 is nearly identical to the XPedite5370 - * so we use the XPedite5370 settings as a basis for the XPedite5170. - */ - -typedef struct board_memctl_options { - uint16_t datarate_mhz_low; - uint16_t datarate_mhz_high; - uint8_t clk_adjust; - uint8_t cpo_override; - uint8_t write_data_delay; -} board_memctl_options_t; - -static struct board_memctl_options bopts_ctrl[][2] = { - { - /* Controller 0 */ - { - /* DDR2 600/667 */ - .datarate_mhz_low = 500, - .datarate_mhz_high = 750, - .clk_adjust = 5, - .cpo_override = 8, - .write_data_delay = 2, - }, - { - /* DDR2 800 */ - .datarate_mhz_low = 750, - .datarate_mhz_high = 850, - .clk_adjust = 5, - .cpo_override = 9, - .write_data_delay = 2, - }, - }, - { - /* Controller 1 */ - { - /* DDR2 600/667 */ - .datarate_mhz_low = 500, - .datarate_mhz_high = 750, - .clk_adjust = 5, - .cpo_override = 7, - .write_data_delay = 2, - }, - { - /* DDR2 800 */ - .datarate_mhz_low = 750, - .datarate_mhz_high = 850, - .clk_adjust = 5, - .cpo_override = 8, - .write_data_delay = 2, - }, - }, -}; - -void fsl_ddr_board_options(memctl_options_t *popts, - dimm_params_t *pdimm, - unsigned int ctrl_num) -{ - struct board_memctl_options *bopts = bopts_ctrl[ctrl_num]; - sys_info_t sysinfo; - int i; - unsigned int datarate; - - get_sys_info(&sysinfo); - datarate = get_ddr_freq(0) / 1000000; - - for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) { - if ((bopts[i].datarate_mhz_low <= datarate) && - (bopts[i].datarate_mhz_high >= datarate)) { - debug("controller %d:\n", ctrl_num); - debug(" clk_adjust = %d\n", bopts[i].clk_adjust); - debug(" cpo = %d\n", bopts[i].cpo_override); - debug(" write_data_delay = %d\n", - bopts[i].write_data_delay); - popts->clk_adjust = bopts[i].clk_adjust; - popts->cpo_override = bopts[i].cpo_override; - popts->write_data_delay = bopts[i].write_data_delay; - } - } - - /* - * Factors to consider for half-strength driver enable: - * - number of DIMMs installed - */ - popts->half_strength_driver_enable = 0; -} diff --git a/board/xes/xpedite517x/law.c b/board/xes/xpedite517x/law.c deleted file mode 100644 index b82f9f0d3b1..00000000000 --- a/board/xes/xpedite517x/law.c +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#include <common.h> -#include <asm/fsl_law.h> -#include <asm/mmu.h> - -/* - * Notes: - * CCSRBAR don't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - */ - -struct law_entry law_table[] = { - SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), -#ifdef CONFIG_SYS_NAND_BASE - /* NAND LAW covers 2 NAND flashes */ - SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_512K, LAW_TRGT_IF_LBC), -#endif -}; - -int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c deleted file mode 100644 index 8a5b52c4952..00000000000 --- a/board/xes/xpedite517x/xpedite517x.c +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2009 Extreme Engineering Solutions, Inc. - */ - -#include <common.h> -#include <init.h> -#include <asm/global_data.h> -#include <asm/processor.h> -#include <fsl_ddr_sdram.h> -#include <asm/mmu.h> -#include <asm/io.h> -#include <fdt_support.h> -#include <pca953x.h> -#include "../common/fsl_8xxx_misc.h" - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI) -extern void ft_board_pci_setup(void *blob, struct bd_info *bd); -#endif - -/* - * Print out which flash was booted from and if booting from the 2nd flash, - * swap flash chip selects to maintain consistent flash numbering/addresses. - */ -static void flash_cs_fixup(void) -{ - int flash_sel; - - /* - * Print boot dev and swap flash flash chip selects if booted from 2nd - * flash. Swapping chip selects presents user with a common memory - * map regardless of which flash was booted from. - */ - flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & - CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); - printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); - - if (flash_sel) { - set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); - set_lbc_or(0, CONFIG_SYS_OR1_PRELIM); - - set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); - set_lbc_or(1, CONFIG_SYS_OR0_PRELIM); - } -} - -int board_early_init_r(void) -{ - /* Initialize PCA9557 devices */ - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0); - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0); - - flash_cs_fixup(); - - return 0; -} - -int dram_init(void) -{ - phys_size_t dram_size = fsl_ddr_sdram(); - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* Initialize and enable DDR ECC */ - ddr_enable_ecc(dram_size); -#endif - - gd->ram_size = dram_size; - - return 0; -} - -#if defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, struct bd_info *bd) -{ -#ifdef CONFIG_PCI - ft_board_pci_setup(blob, bd); -#endif - ft_cpu_setup(blob, bd); - - return 0; -} -#endif |