Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.04

ARM64:
- Add INIT_SPL_RELATIVE dependency

SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()

Pytest:
- Add test for octal/hex conversions

Microblaze:
- Fix manual relocation for one SPI instance

Nand:
- Convert zynq/zynqmp drivers to DM

Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL

Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups

ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285

Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default

1 files changed, 0 insertions, 8 deletions

diff --git a/board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c
index fcd6a46ad9f..15f0be1a43a 100644
--- a/board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c
@@ -463,14 +463,6 @@ static unsigned long psu_peripherals_init_data(void)
 	psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
 	psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
-	psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
-	psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
-	psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
-	psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
-	psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
-	psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
-	psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
-	psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
 	psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
 	psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
 	psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);