diff options
| author | Michal Simek | 2024-02-14 12:52:33 +0100 |
|---|---|---|
| committer | Michal Simek | 2024-03-01 08:41:39 +0100 |
| commit | 451b2ea21105ec302369093f2d1e25183d35fd3d (patch) | |
| tree | ab2dbe72298d4d79b372ea8fad1e97a128c07226 /board/xilinx | |
| parent | 9600e8d39ccf4daa1ac3aca54bc596985904e245 (diff) | |
riscv: mbv: Enable SPL and binman
Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb
(supervisor mode). DTB is placed at fixed address to ensure that it is 8
byte aligned which is not ensured when dtb is attached behind SPL binary
that's why SPL and U-Boot are taking DTB from the same address.
Also align addresses for both defconfigs.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com
Diffstat (limited to 'board/xilinx')
| -rw-r--r-- | board/xilinx/common/board.c | 8 | ||||
| -rw-r--r-- | board/xilinx/mbv/Kconfig | 11 | ||||
| -rw-r--r-- | board/xilinx/mbv/board.c | 10 |
3 files changed, 29 insertions, 0 deletions
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 9641ed307b7..e5ab32f901b 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -358,6 +358,14 @@ void *board_fdt_blob_setup(int *err) void *fdt_blob; *err = 0; + + if (IS_ENABLED(CONFIG_TARGET_XILINX_MBV)) { + fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR; + + if (fdt_magic(fdt_blob) == FDT_MAGIC) + return fdt_blob; + } + if (!IS_ENABLED(CONFIG_SPL_BUILD) && !IS_ENABLED(CONFIG_VERSAL_NO_DDR) && !IS_ENABLED(CONFIG_ZYNQMP_NO_DDR)) { diff --git a/board/xilinx/mbv/Kconfig b/board/xilinx/mbv/Kconfig index 553c2320697..9d5ee65cea6 100644 --- a/board/xilinx/mbv/Kconfig +++ b/board/xilinx/mbv/Kconfig @@ -15,12 +15,23 @@ config SYS_CONFIG_NAME config TEXT_BASE default 0x21200000 +config SPL_TEXT_BASE + default 0x20000000 + +config SPL_OPENSBI_LOAD_ADDR + hex + default 0x20200000 + config BOARD_SPECIFIC_OPTIONS def_bool y select GENERIC_RISCV + select SUPPORT_SPL imply BOARD_LATE_INIT + imply SPL_RAM_SUPPORT + imply SPL_RAM_DEVICE imply CMD_SBI imply CMD_PING + imply OF_HAS_PRIOR_STAGE source "board/xilinx/Kconfig" diff --git a/board/xilinx/mbv/board.c b/board/xilinx/mbv/board.c index ccf4395d6ac..c478f7e04a0 100644 --- a/board/xilinx/mbv/board.c +++ b/board/xilinx/mbv/board.c @@ -5,7 +5,17 @@ * Michal Simek <michal.simek@amd.com> */ +#include <spl.h> + int board_init(void) { return 0; } + +#ifdef CONFIG_SPL +u32 spl_boot_device(void) +{ + /* RISC-V QEMU only supports RAM as SPL boot device */ + return BOOT_DEVICE_RAM; +} +#endif |