diff options
| author | Beniamino Galvani | 2018-06-14 13:43:40 +0200 |
|---|---|---|
| committer | Tom Rini | 2018-06-19 07:31:47 -0400 |
| commit | 2e668af5531815dc6a6190cf6490b866da71ffaa (patch) | |
| tree | 19f0f2494c4484d7476472ead10d9e4a1d820c26 /board | |
| parent | c0fc1e215c6117b159bb9ca736d3e3338bbc028b (diff) | |
meson: use the clock driver
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/amlogic/libretech-cc/libretech-cc.c | 4 | ||||
| -rw-r--r-- | board/amlogic/odroid-c2/odroid-c2.c | 3 |
2 files changed, 0 insertions, 7 deletions
diff --git a/board/amlogic/libretech-cc/libretech-cc.c b/board/amlogic/libretech-cc/libretech-cc.c index e89bf773cc7..ccab1272c59 100644 --- a/board/amlogic/libretech-cc/libretech-cc.c +++ b/board/amlogic/libretech-cc/libretech-cc.c @@ -32,10 +32,6 @@ int misc_init_r(void) meson_gx_eth_init(PHY_INTERFACE_MODE_RMII, MESON_GXL_USE_INTERNAL_RMII_PHY); - /* Enable power and clock gate */ - setbits_le32(GX_GCLK_MPEG_1, GX_GCLK_MPEG_1_ETH); - clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); - if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, mac_addr, EFUSE_MAC_SIZE); diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c index 1b7fd8199bb..c47b9ce9cb7 100644 --- a/board/amlogic/odroid-c2/odroid-c2.c +++ b/board/amlogic/odroid-c2/odroid-c2.c @@ -30,9 +30,6 @@ int misc_init_r(void) meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0); - /* Enable power and clock gate */ - setbits_le32(GX_GCLK_MPEG_0, GX_GCLK_MPEG_0_I2C); - /* Reset PHY on GPIOZ_14 */ clrbits_le32(GX_GPIO_EN(3), BIT(14)); clrbits_le32(GX_GPIO_OUT(3), BIT(14)); |