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authorPeng Fan2022-05-05 15:43:36 +0800
committerStefano Babic2022-05-20 09:30:28 +0200
commit6ea118ef9ae123c70cd36cab411d4ef1ea4135e3 (patch)
tree00d50a8b787ebfe738124b25a75c18579cdd5988 /board
parent2232d5f5b7ef1d49814686573f34624891f0c7f1 (diff)
imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/data_modul/imx8mm_edm_sbc/spl.c12
1 files changed, 2 insertions, 10 deletions
diff --git a/board/data_modul/imx8mm_edm_sbc/spl.c b/board/data_modul/imx8mm_edm_sbc/spl.c
index 36cad14fc41..f5063eb8c19 100644
--- a/board/data_modul/imx8mm_edm_sbc/spl.c
+++ b/board/data_modul/imx8mm_edm_sbc/spl.c
@@ -28,14 +28,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-static const iomux_v3_cfg_t uart_pads[] = {
- IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static const iomux_v3_cfg_t wdog_pads[] = {
IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -47,8 +41,6 @@ static void data_modul_imx8mm_edm_sbc_early_init_f(void)
imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
set_wdog_reset(wdog);
-
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
}
static int data_modul_imx8mm_edm_sbc_board_power_init(void)
@@ -149,8 +141,6 @@ void board_init_f(ulong dummy)
data_modul_imx8mm_edm_sbc_early_init_f();
- preloader_console_init();
-
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
@@ -160,6 +150,8 @@ void board_init_f(ulong dummy)
hang();
}
+ preloader_console_init();
+
ret = uclass_get_device_by_name(UCLASS_CLK,
"clock-controller@30380000",
&dev);