diff options
author | Konstantin Porotchkin | 2021-03-16 17:20:57 +0100 |
---|---|---|
committer | Stefan Roese | 2021-04-29 07:45:13 +0200 |
commit | c405226c344049191a9e29333b491decc0dc9067 (patch) | |
tree | f81863b18d398bbb4684da8252907c681cc65b4d /board | |
parent | 236f17ce1405ee248cfd92ec9b65087ff2e2fce2 (diff) |
arm: octeontx2: Add Octeon TX2 CN9130 CRB support
This patch adds the base support for the Marvell Octeon TX2 CN9130 CRB.
Not all interfaces are supported fully yet.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/Marvell/octeontx2_cn913x/MAINTAINERS | 5 | ||||
-rw-r--r-- | board/Marvell/octeontx2_cn913x/Makefile | 8 | ||||
-rw-r--r-- | board/Marvell/octeontx2_cn913x/board.c | 45 |
3 files changed, 58 insertions, 0 deletions
diff --git a/board/Marvell/octeontx2_cn913x/MAINTAINERS b/board/Marvell/octeontx2_cn913x/MAINTAINERS new file mode 100644 index 00000000000..d469e16ea75 --- /dev/null +++ b/board/Marvell/octeontx2_cn913x/MAINTAINERS @@ -0,0 +1,5 @@ +OCTEONTX2_CN913x BOARD +M: Kostya Porotchkin <kostap@marvell.com> +S: Maintained +F: board/Marvell/octeontx2_cn913x/ +F: configs/mvebu_crb_cn9130_defconfig diff --git a/board/Marvell/octeontx2_cn913x/Makefile b/board/Marvell/octeontx2_cn913x/Makefile new file mode 100644 index 00000000000..8c6ffb93287 --- /dev/null +++ b/board/Marvell/octeontx2_cn913x/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2016 Stefan Roese <sr@denx.de> +# Copyright (C) 2019 Marvell International Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := board.o diff --git a/board/Marvell/octeontx2_cn913x/board.c b/board/Marvell/octeontx2_cn913x/board.c new file mode 100644 index 00000000000..953e9db9c8e --- /dev/null +++ b/board/Marvell/octeontx2_cn913x/board.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Stefan Roese <sr@denx.de> + * Copyright (C) 2020 Marvell International Ltd. + */ + +#include <dm.h> +#include <power/regulator.h> + +DECLARE_GLOBAL_DATA_PTR; + +__weak int soc_early_init_f(void) +{ + return 0; +} + +int board_early_init_f(void) +{ + soc_early_init_f(); + + return 0; +} + +int board_early_init_r(void) +{ + if (CONFIG_IS_ENABLED(DM_REGULATOR)) { + /* Check if any existing regulator should be turned down */ + regulators_enable_boot_off(false); + } + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +int board_late_init(void) +{ + return 0; +} |