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authorMarek BehĂșn2020-04-08 19:25:22 +0200
committerStefan Roese2020-04-14 13:16:42 +0200
commitc64ac3b3185aeb3846297ad7391fc6df8ecd73bf (patch)
tree8c5f468ee339a5e889c0f9c60a714c392cca6ce6 /board
parentcb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7 (diff)
arm: mvebu: turris_mox: fix PCIe ranges in device tree
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that MOX boards with 4 GB RAM are fully supported. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/CZ.NIC/turris_mox/turris_mox.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 8e4c0231032..470ea32f9c3 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
#include <asm/gpio.h>
@@ -104,6 +105,11 @@ int board_fix_fdt(void *blob)
return 0;
}
+ if (a3700_fdt_fix_pcie_regions(blob) < 0) {
+ printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
+ return 0;
+ }
+
return 0;
}
#endif
@@ -708,6 +714,11 @@ int ft_board_setup(void *blob, bd_t *bd)
res = fdt_setprop_string(blob, node, "status", "okay");
if (res < 0)
return res;
+
+ /* Fix PCIe regions for devices with 4 GB RAM */
+ res = a3700_fdt_fix_pcie_regions(blob);
+ if (res < 0)
+ return res;
}
/*