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authorHannes Schmelzer2018-07-06 15:41:28 +0200
committerTom Rini2018-07-19 17:03:35 -0400
commitfbc7c7decf47b22717d3aad13358f4d7440e7055 (patch)
tree3af4a1f749b091f4b8f1fb979bc732b37fc12602 /board
parent19aa4ac09db91c07bc0e6c9a5a90fd501a97e1a3 (diff)
board/BuR/brppt1: convert brppt1 boards to driver model
- add a devicetree for each variant (mmc, spi, nand) - drop unneeded code from board and bur/common - drop unneeded stuff from config header files - minor adaptions to be compliant with driver model (requesting gpio,..) - harmonize the commandset over all brppt1 targets Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Diffstat (limited to 'board')
-rw-r--r--board/BuR/brppt1/board.c24
-rw-r--r--board/BuR/common/common.c101
2 files changed, 24 insertions, 101 deletions
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
index 87b76a660c5..d2e7c722423 100644
--- a/board/BuR/brppt1/board.c
+++ b/board/BuR/brppt1/board.c
@@ -77,6 +77,8 @@ static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1};
void am33xx_spl_board_init(void)
{
+ int rc;
+
struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER;
/*struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP;*/
struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;
@@ -108,8 +110,21 @@ void am33xx_spl_board_init(void)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
pmicsetup(0);
- gpio_direction_output(64+29, 1); /* switch NAND_RnB to GPMC_WAIT1 */
- gpio_direction_output(64+28, 1); /* switch MII2_CRS to GPMC_WAIT0 */
+ /* peripheral reset */
+ rc = gpio_request(64 + 29, "GPMC_WAIT1");
+ if (rc != 0)
+ printf("cannot request GPMC_WAIT1 GPIO!\n");
+ rc = gpio_direction_output(64 + 29, 1);
+ if (rc != 0)
+ printf("cannot set GPMC_WAIT1 GPIO!\n");
+
+ rc = gpio_request(64 + 28, "GPMC_WAIT0");
+ if (rc != 0)
+ printf("cannot request GPMC_WAIT0 GPIO!\n");
+ rc = gpio_direction_output(64 + 28, 1);
+ if (rc != 0)
+ printf("cannot set GPMC_WAIT0 GPIO!\n");
+
}
const struct dpll_params *get_dpll_ddr_params(void)
@@ -151,10 +166,13 @@ int board_late_init(void)
{
unsigned char bmode = 0;
ulong bootcount = 0;
+ int rc;
bootcount = bootcount_load() & 0xF;
- if (gpio_get_value(REPSWITCH) == 0 || bootcount == 12)
+ rc = gpio_request(REPSWITCH, "REPSWITCH");
+
+ if (rc != 0 || gpio_get_value(REPSWITCH) == 0 || bootcount == 12)
bmode = 12;
else if (bootcount > 0)
bmode = 0;
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 01e30783e2c..f3eae5cbc1e 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -22,15 +22,11 @@
#include <asm/io.h>
#include <asm/gpio.h>
#include <i2c.h>
-#include <miiphy.h>
-#include <cpsw.h>
#include <power/tps65217.h>
#include <lcd.h>
#include "bur_common.h"
#include "../../../drivers/video/am335x-fb.h"
-static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-
DECLARE_GLOBAL_DATA_PTR;
/* --------------------------------------------------------------------------*/
@@ -270,6 +266,9 @@ int ft_board_setup(void *blob, bd_t *bd)
}
#ifdef CONFIG_SPL_BUILD
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
void pmicsetup(u32 mpupll)
{
int mpu_vdd;
@@ -354,100 +353,6 @@ void set_mux_conf_regs(void)
#endif /* CONFIG_SPL_BUILD */
-#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
- (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
-static void cpsw_control(int enabled)
-{
- /* VTP can be added here */
- return;
-}
-
-/* describing port offsets of TI's CPSW block */
-static struct cpsw_slave_data cpsw_slaves[] = {
- {
- .slave_reg_ofs = 0x208,
- .sliver_reg_ofs = 0xd80,
- .phy_addr = 1,
- },
- {
- .slave_reg_ofs = 0x308,
- .sliver_reg_ofs = 0xdc0,
- .phy_addr = 2,
- },
-};
-
-static struct cpsw_platform_data cpsw_data = {
- .mdio_base = CPSW_MDIO_BASE,
- .cpsw_base = CPSW_BASE,
- .mdio_div = 0xff,
- .channels = 8,
- .cpdma_reg_ofs = 0x800,
- .slaves = 1,
- .slave_data = cpsw_slaves,
- .ale_reg_ofs = 0xd00,
- .ale_entries = 1024,
- .host_port_reg_ofs = 0x108,
- .hw_stats_reg_ofs = 0x900,
- .bd_ram_ofs = 0x2000,
- .mac_control = (1 << 5),
- .control = cpsw_control,
- .host_port_num = 0,
- .version = CPSW_CTRL_VERSION_2,
-};
-#endif /* CONFIG_DRIVER_TI_CPSW, ... */
-
-#if defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)
-int board_eth_init(bd_t *bis)
-{
- int rv = 0;
- char mac_addr[6];
- const char *mac = 0;
- uint32_t mac_hi, mac_lo;
- /* try reading mac address from efuse */
- mac_lo = readl(&cdev->macid0l);
- mac_hi = readl(&cdev->macid0h);
- mac_addr[0] = mac_hi & 0xFF;
- mac_addr[1] = (mac_hi & 0xFF00) >> 8;
- mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
- mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
- mac_addr[4] = mac_lo & 0xFF;
- mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-
- if (!env_get("ethaddr")) {
- if (!mac) {
- printf("<ethaddr> not set. validating E-fuse MAC ... ");
- if (is_valid_ethaddr((const u8 *)mac_addr))
- mac = (const char *)mac_addr;
- }
-
- if (mac) {
- printf("using: %pM on ", mac);
- eth_env_set_enetaddr("ethaddr", (const u8 *)mac);
- }
- }
- writel(MII_MODE_ENABLE, &cdev->miisel);
- cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
- cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII;
-
- rv = cpsw_register(&cpsw_data);
- if (rv < 0) {
- printf("Error %d registering CPSW switch\n", rv);
- return 0;
- }
- return rv;
-}
-#endif /* defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD) */
-#if defined(CONFIG_MMC)
-int board_mmc_init(bd_t *bis)
-{
- int rc = 0;
-
- rc |= omap_mmc_init(0, 0, 0, -1, -1);
- rc |= omap_mmc_init(1, 0, 0, -1, -1);
-
- return rc;
-}
-#endif
int overwrite_console(void)
{
return 1;