diff options
| author | Krunal Bhargav | 2019-09-16 13:47:19 +0530 |
|---|---|---|
| committer | Tom Rini | 2019-10-11 13:31:17 -0400 |
| commit | 92ffd0d9ed9a8389a7fb28addcd46547d6fb8539 (patch) | |
| tree | b086a95911e14ab2d320f6dc8fde4ce98e7197c9 /cmd/ti/ddr3.c | |
| parent | 2b2e1573cffbe5d47712d138690f45e01353c3f5 (diff) | |
cmd: ti: ddr3: Move the print statement after test
If the ECC is enabled over the entire memory region, we need to ensure
the printf/put calls do not modify the stack after ECC is disabled.
Moved the printf/put statements after ECC is enabled.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'cmd/ti/ddr3.c')
| -rw-r--r-- | cmd/ti/ddr3.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c index 34f870ab43a..448a7f54a91 100644 --- a/cmd/ti/ddr3.c +++ b/cmd/ti/ddr3.c @@ -202,10 +202,6 @@ static int ddr_memory_ecc_err(u32 addr, u32 ecc_err) writel(val2, addr); val3 = readl(addr); - printf("\tECC test: addr 0x%x, read data 0x%x, written data 0x%x, err pattern: 0x%x, read after write data 0x%x\n", - addr, val1, val2, ecc_err, val3); - - puts("\tECC test: Enabling DDR ECC ...\n"); #ifdef CONFIG_ARCH_KEYSTONE ecc_ctrl = ECC_START_ADDR1 | (ECC_END_ADDR1 << 16); writel(ecc_ctrl, EMIF1_BASE + KS2_DDR3_ECC_ADDR_RANGE1_OFFSET); @@ -214,6 +210,11 @@ static int ddr_memory_ecc_err(u32 addr, u32 ecc_err) writel(ecc_ctrl, &emif->emif_ecc_ctrl_reg); #endif + printf("\tECC test: addr 0x%x, read data 0x%x, written data 0x%x, err pattern: 0x%x, read after write data 0x%x\n", + addr, val1, val2, ecc_err, val3); + + puts("\tECC test: Enabled DDR ECC ...\n"); + val1 = readl(addr); printf("\tECC test: addr 0x%x, read data 0x%x\n", addr, val1); |