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authorPatrice Chotard2018-08-09 11:57:57 +0200
committerTom Rini2018-09-10 20:48:18 -0400
commit798cd708d5e41fa86b0ff49ee996db9b9833e430 (patch)
tree2222d28647f2e02c00723af4d73412afb5673b6a /cmd/tpm-v2.c
parentc8e570167f8a2eadbd5f3c7a2b38a9e3796cea19 (diff)
gpio: stm32f7: replace ODR update by BSRR write
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 write operation). Moreover this register if safe for simultaneous access by 2 master on the bus. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'cmd/tpm-v2.c')
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