Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation

1 files changed, 6 insertions, 3 deletions

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 0f6d0f77507..ac713cad1b6 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -189,16 +189,19 @@ static void efi_carve_out_dt_rsv(void *fdt)
 	if (nodeoffset >= 0) {
 		subnode = fdt_first_subnode(fdt, nodeoffset);
 		while (subnode >= 0) {
+			fdt_addr_t fdt_addr, fdt_size;
+
 			/* check if this subnode has a reg property */
-			addr = fdtdec_get_addr_size(fdt, subnode, "reg",
-						    (fdt_size_t *)&size);
+			fdt_addr = fdtdec_get_addr_size_auto_parent(
+						fdt, nodeoffset, subnode,
+						"reg", 0, &fdt_size, false);
 			/*
 			 * The /reserved-memory node may have children with
 			 * a size instead of a reg property.
 			 */
 			if (addr != FDT_ADDR_T_NONE &&
 			    fdtdec_get_is_enabled(fdt, subnode))
-				efi_reserve_memory(addr, size);
+				efi_reserve_memory(fdt_addr, fdt_size);
 			subnode = fdt_next_subnode(fdt, subnode);
 		}
 	}