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authorSean Anderson2023-11-04 16:37:44 -0400
committerTom Rini2023-11-16 12:43:48 -0500
commit38ef64e6ce3d1f84478c6d2700e4d76f80cfcaf4 (patch)
tree4b390e237ef5d64a318e6381c570291c5e45bb3e /common
parent57d3da6fee1d4d8691a74d9b7bb5b7bc0d4e4e63 (diff)
spl: nand: Set bl_len to page size
Since commit 34793598c83 ("mtd: nand: mxs_nand_spl: Remove the page aligned access") there are no longer any users of nand_get_mtd. However, it is still important to know what the page size is so we can allocate a large-enough buffer. If the image size is not page-aligned, we will go off the end of the buffer and clobber some memory. Introduce a new function nand_page_size which returns the page size. For most drivers it is easy to determine the page size. However, a few need to be modified since they only keep the page size around temporarily. It's possible that this patch could cause a regression on some platforms if the offset is non-aligned and there is invalid address space immediately before the load address. spl_load_legacy_img does not (except when compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or SPL_LOAD_IMX_CONTAINER (none in tree) would be affected. defconfig CONFIG_TEXT_BASE ======================= ================ am335x_evm 0x80800000 am43xx_evm 0x80800000 am43xx_evm_rtconly 0x80800000 am43xx_evm_usbhost_boot 0x80800000 am43xx_hs_evm 0x80800000 dra7xx_evm 0x80800000 gwventana_nand 0x17800000 imx8mn_bsh_smm_s2 0x40200000 All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a little underflow. Signed-off-by: Sean Anderson <seanga2@gmail.com>
Diffstat (limited to 'common')
-rw-r--r--common/spl/spl_nand.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 5b6932bf7e0..57a7a1a73b9 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -72,23 +72,18 @@ static ulong spl_nand_legacy_read(struct spl_load_info *load, ulong offs,
return size;
}
-struct mtd_info * __weak nand_get_mtd(void)
-{
- return NULL;
-}
-
static int spl_nand_load_element(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev,
int offset, struct legacy_img_hdr *header)
{
- struct mtd_info *mtd = nand_get_mtd();
- int bl_len = mtd ? mtd->writesize : 1;
+ int bl_len;
int err;
err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
if (err)
return err;
+ bl_len = nand_page_size();
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
struct spl_load_info load;
@@ -118,7 +113,7 @@ static int spl_nand_load_element(struct spl_image_info *spl_image,
load.dev = NULL;
load.priv = NULL;
load.filename = NULL;
- load.bl_len = 1;
+ load.bl_len = IS_ENABLED(CONFIG_SPL_LZMA) ? bl_len : 1;
load.read = spl_nand_legacy_read;
return spl_load_legacy_img(spl_image, bootdev, &load, offset, header);