diff options
| author | Mario Six | 2019-01-21 09:18:03 +0100 |
|---|---|---|
| committer | Mario Six | 2019-05-21 07:52:33 +0200 |
| commit | fe7d654d04a4ba87813dcf8acb7a17373029770d (patch) | |
| tree | acff08e60a356274b602f42d44a975b7a279eca2 /configs/MPC8313ERDB_33_defconfig | |
| parent | daac2086ce1a36ffbd603eb643f45d14faae40e7 (diff) | |
mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'configs/MPC8313ERDB_33_defconfig')
| -rw-r--r-- | configs/MPC8313ERDB_33_defconfig | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index 5783165e5d1..1588adf3d66 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -103,3 +103,53 @@ CONFIG_PHY_MARVELL=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_ELBC_BR_OR_NAND_PRELIM_1=y +CONFIG_ELBC_BR0_OR0=y +CONFIG_BR0_OR0_NAME="FLASH" +CONFIG_BR0_OR0_BASE=0xFE000000 +CONFIG_BR0_MACHINE_GPCM=y +CONFIG_BR0_PORTSIZE_16BIT=y +CONFIG_OR0_AM_8_MBYTES=y +CONFIG_OR0_EAD_EXTRA=y +CONFIG_OR0_SCY_9=y +CONFIG_OR0_XACS_EXTENDED=y +CONFIG_OR0_EHTR_1_CYCLE=y +CONFIG_ELBC_BR1_OR1=y +CONFIG_BR1_OR1_NAME="NAND" +CONFIG_BR1_OR1_BASE=0xE2800000 +CONFIG_BR1_ERRORCHECKING_BOTH=y +CONFIG_BR1_MACHINE_FCM=y +CONFIG_BR1_PORTSIZE_8BIT=y +CONFIG_OR1_AM_32_KBYTES=y +CONFIG_OR1_SCY_1=y +CONFIG_OR1_TRLX_RELAXED=y +CONFIG_OR1_CHT_TWO_CLOCK=y +CONFIG_OR1_CSCT_8_CYCLE=y +CONFIG_OR1_CST_ONE_CLOCK=y +CONFIG_OR1_EHTR_8_CYCLE=y +CONFIG_ELBC_BR3_OR3=y +CONFIG_BR3_OR3_NAME="BCSR" +CONFIG_BR3_OR3_BASE=0xFA000000 +CONFIG_BR3_MACHINE_GPCM=y +CONFIG_BR3_PORTSIZE_8BIT=y +CONFIG_OR3_AM_32_KBYTES=y +CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR3_CSNT_EARLIER=y +CONFIG_OR3_EAD_EXTRA=y +CONFIG_OR3_SCY_15=y +CONFIG_OR3_XACS_EXTENDED=y +CONFIG_OR3_TRLX_RELAXED=y +CONFIG_OR3_EHTR_8_CYCLE=y +CONFIG_ELBC_BR2_OR2=y +CONFIG_BR2_OR2_NAME="VSC7385" +CONFIG_BR2_OR2_BASE=0xF0000000 +CONFIG_BR2_MACHINE_GPCM=y +CONFIG_BR2_PORTSIZE_8BIT=y +CONFIG_OR2_AM_128_KBYTES=y +CONFIG_OR2_CSNT_EARLIER=y +CONFIG_OR2_EAD_EXTRA=y +CONFIG_OR2_SCY_15=y +CONFIG_OR2_SETA_EXTERNAL=y +CONFIG_OR2_XACS_EXTENDED=y +CONFIG_OR2_TRLX_RELAXED=y +CONFIG_OR2_EHTR_8_CYCLE=y |