diff options
| author | Pali Rohár | 2022-06-16 14:19:44 +0200 |
|---|---|---|
| committer | Tom Rini | 2022-06-28 09:40:02 -0400 |
| commit | c0f47562162f7f6ede331514ff2b59bff204a448 (patch) | |
| tree | 3a6bd08b212e42c88486ad30df361c3c52b310ce /configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | |
| parent | ea82ed8c2eaee0a0f7dee31016aaee4ce88e9ea7 (diff) | |
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).
Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.
After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.
Tested on P2020 board with SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Diffstat (limited to 'configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig')
| -rw-r--r-- | configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 8a6c44d4898..39feff2f483 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -1,5 +1,5 @@ CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0x11001000 +CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" -CONFIG_SPL_TEXT_BASE=0xD0001000 +CONFIG_SPL_TEXT_BASE=0xD0000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y @@ -34,7 +34,7 @@ CONFIG_SPL_SPI_BOOT=y CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y CONFIG_SPL_FLUSH_IMAGE=y CONFIG_SPL_GD_ADDR=0xd0018000 -CONFIG_SPL_RELOC_TEXT_BASE=0xd0001000 +CONFIG_SPL_RELOC_TEXT_BASE=0xd0000000 CONFIG_SPL_RELOC_STACK=0xd001c000 CONFIG_SPL_RELOC_MALLOC=y CONFIG_SPL_RELOC_MALLOC_ADDR=0xd0020000 |