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author | Nitin Yadav | 2023-04-06 13:29:36 +0530 |
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committer | Tom Rini | 2023-05-03 09:05:24 -0400 |
commit | 4d03f476a709962dc9789273cedaecf1f9bfae57 (patch) | |
tree | 210e7f2724f97c0595d60a11392d4a3f882bff61 /configs/blanche_defconfig | |
parent | 7bf341ae4dfb3f126323cd906efe37e46851c9fa (diff) |
arm: mach-k3: Workaround errata ID i2331
Errata doc: https://www.ti.com/lit/pdf/sprz457
Errata ID i2331 CPSW: Device lockup when reading CPSW registers
Details: A device lockup can occur during the second read of any CPSW
subsystem register after any MAIN domain power on reset (POR). A MAIN
domain POR occurs using the hardware MCU_PORz signal, or via software
using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR.
After these resets, the processor and internal bus structures may get
into a state which is only recoverable with full device reset using
MCU_PORz.
Due to this errata, Ethernet boot should not be used on this device.
Workaround(s): To avoid the lockup, a warm reset should be issued after
a MAIN domain POR and before any access to the CPSW registers. The warm
reset realigns internal clocks and prevents the lockup from happening.
Workaround above errata by calling do_reset() in case of cold boot in
order to trigger warm reset. This needs enabling SYSRESET driver in R5
SPL to enable TI SCI reset driver.
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Diffstat (limited to 'configs/blanche_defconfig')
0 files changed, 0 insertions, 0 deletions