diff options
author | Peng Fan | 2021-08-07 16:01:13 +0800 |
---|---|---|
committer | Stefano Babic | 2021-08-09 14:46:51 +0200 |
commit | 3f2b4d7220c3a957f6dc0a0954fde40e94b25b8a (patch) | |
tree | 5424112569921b57721833b03ccc3f3a9a0b229c /configs/imx8ulp_evk_defconfig | |
parent | 6beec0e78caf1022564356a128d22074daa4d0c7 (diff) |
arm: imx: add i.MX8ULP EVK support
Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART
Log as below: I would keep some debug info for now, and after we move
to be stable and production launch, we could drop that.
U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800)
Normal Boot
upower_init: soc_id=48
upower_init: version:11.11.6
upower_init: start uPower RAM service
user_upwr_rdy_callb: soc=b
user_upwr_rdy_callb: RAM version:12.6
Turn on switches ok
Turn on memories ok
Clear DDR retention ok
Poll for freq_chg_req on SIM register and change to F1 frequency.
Poll for freq_chg_req on SIM register and change to F0 frequency.
Poll for freq_chg_req on SIM register and change to F1 frequency.
Poll for freq_chg_req on SIM register and change to F2 frequency.
Poll for freq_chg_req on SIM register and change to F1 frequency.
Poll for freq_chg_req on SIM register and change to F2 frequency.
complete
De-Skew PLL is locked and ready
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
Load image from 0x3a800 by ROM_API
NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94
NOTICE: BL31: Built : 01:56:58, Jun 29 2021
NOTICE: upower_init: start uPower RAM service
NOTICE: user_upwr_rdy_callb: soc=b
NOTICE: user_upwr_rdy_callb: RAM version:12.6
U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800)
CPU: Freescale i.MX8ULP rev1.0 at 744 MHz
Reset cause: POR
Boot mode: Single boot
Model: FSL i.MX8ULP EVK
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 2
Loading Environment from MMC... ***
Warning - bad CRC, using default environment
In: serial@293a0000
Out: serial@293a0000
Err: serial@293a0000
Net:
Warning: ethernet@29950000 (eth0) using random MAC address -
96:35:88:62:e0:44
eth0: ethernet@29950000
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'configs/imx8ulp_evk_defconfig')
-rw-r--r-- | configs/imx8ulp_evk_defconfig | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig new file mode 100644 index 00000000000..464e30601dc --- /dev/null +++ b/configs/imx8ulp_evk_defconfig @@ -0,0 +1,103 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX8ULP=y +CONFIG_SYS_TEXT_BASE=0x80200000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DM_GPIO=y +CONFIG_TARGET_IMX8ULP_EVK=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0x22020000 +CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=0 +CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk" +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +#CONFIG_SPL_RAM_SUPPORT=y +#CONFIG_SPL_RAM_DEVICE=y +#CONFIG_SPL_MMC_SUPPORT=y + +CONFIG_SPL_BOOTROM_SUPPORT=y +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 + +CONFIG_HUSH_PARSER=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8ulp-evk" +CONFIG_SPL_DM=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8ULP=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_FSL_USDHC=y +CONFIG_CMD_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_MISC=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd" + +CONFIG_CMD_I2C=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_READ=y +CONFIG_BAUDRATE=115200 + +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y + +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_MMC_ENV_DEV=0 + +CONFIG_ULP_WATCHDOG=y +CONFIG_SPL_WATCHDOG=y + +CONFIG_CMD_SF=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_CS=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SF_DEFAULT_MODE=0 + +CONFIG_IMX_RGPIO2P=y +CONFIG_USE_ARCH_MEMCPY=y + +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_CMD_NET=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_NET_RANDOM_ETHADDR=y + +CONFIG_EFI_PARTITION=y + +CONFIG_DM_PCA953X=y |