diff options
author | Tom Rini | 2024-04-22 17:24:09 -0600 |
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committer | Tom Rini | 2024-04-22 17:40:37 -0600 |
commit | 18e791c4046a9a636052984df7d287bb5e00990f (patch) | |
tree | 02a8515c6c3d912fa25ee49ecd7960b619fdd7ec /configs/rock2_defconfig | |
parent | 38ea74d6d5c05224acdb03f799897c1bdd56f8cc (diff) |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/rock2_defconfig')
-rw-r--r-- | configs/rock2_defconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 3ebfb4ed436..2f6799c7b6a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -16,6 +16,8 @@ CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK2=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_STACK=0xff718000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 @@ -30,8 +32,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y |