diff options
author | Jonas Karlman | 2023-08-02 19:59:33 +0000 |
---|---|---|
committer | Kever Yang | 2023-10-07 10:23:32 +0800 |
commit | a9e9445ea2bb010444621e563a79bc33fe064f9c (patch) | |
tree | bb9acc81f0d08368951ea570807fa85c8bf955d5 /configs | |
parent | 5b155997d445f770e9a2c0d4a20e4eb13eedfede (diff) |
rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S
Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed
to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C
and NanoPi R5S.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'configs')
-rw-r--r-- | configs/nanopi-r5c-rk3568_defconfig | 5 | ||||
-rw-r--r-- | configs/nanopi-r5s-rk3568_defconfig | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig index badac5805dd..833cff0e457 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -62,6 +65,8 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index fdcb0c266d8..c278ce083d9 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a00000 @@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -62,6 +65,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y |