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authorwdenk2003-04-08 23:25:21 +0000
committerwdenk2003-04-08 23:25:21 +0000
commit60fbe254243ec461ec73da13132be098db33d3fa (patch)
treeaf82977065ec5f1fdea17bd1056395005d652d24 /cpu/mips/cache.S
parent3e38691e8f7aa0d9b498d76c7279ddec6e4946f3 (diff)
Prepare for 0.3.0 release
* Add support for Purple Board (MIPS64 5Kc) * Add support for MIPS64 5Kc CPUs
Diffstat (limited to 'cpu/mips/cache.S')
-rw-r--r--cpu/mips/cache.S9
1 files changed, 7 insertions, 2 deletions
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 2715b9b025c..55daa89e729 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -250,12 +250,17 @@ dcache_disable:
* RETURNS: N/A
*
*/
+#if defined(CONFIG_INCA_IP)
+# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE)
+#elif defined(CONFIG_PURPLE)
+# define CACHE_LOCK_SIZE (CFG_DCACHE_SIZE/2)
+#endif
.globl mips_cache_lock
.ent mips_cache_lock
mips_cache_lock:
- li a1, K0BASE - CFG_DCACHE_SIZE/2
+ li a1, K0BASE - CACHE_LOCK_SIZE
addu a0, a1
- li a2, CFG_DCACHE_SIZE/2
+ li a2, CACHE_LOCK_SIZE
li a3, CFG_CACHELINE_SIZE
move a1, a2
icacheop(a0,a1,a2,a3,0x1d)