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authorMarkus Klotzbuecher2006-07-12 09:08:36 +0200
committerMarkus Klotzbuecher2006-07-12 09:08:36 +0200
commitd6cc73e4e70a7f8712c52ef9d93a19a906cc3d4b (patch)
tree0beb25e5ab6aeeae10b81b19152bbdcb6aee8151 /cpu
parentb02d0177c1ef5be98576dade8f1cd0aed063bae5 (diff)
Bugfix in FEC initialisation:
All MII configuration is done via FEC1 registers. But MII_SPEED was configured according to FEC used. So if only FEC2 was used, this caused the real MII_SPEED register in FEC1 to stay uninitalised, what lead to "mii_send STUCK!" messages. Fix: always configure MII_SPEED on FEC1 only.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc8xx/fec.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index 21c9070d21f..9ebee592d8c 100644
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -396,8 +396,10 @@ static void fec_pin_init(int fecidx)
* * to 2.5 MHz.
* * This MDC frequency is equal to system clock / (2 * MII_SPEED).
* * Then MII_SPEED = system_clock / 2 * 2,5 Mhz.
+ *
+ * All MII configuration is done via FEC1 registers:
*/
- fecp->fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
+ immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
/* our PHYs are the limit at 2.5 MHz */