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authorWeijie Gao2020-04-21 09:28:34 +0200
committerDaniel Schwierzeck2020-04-27 20:29:33 +0200
commit02cd449f0b03a3015577b42fbb4db88606c76c03 (patch)
tree7cc9b437e9a31f96433f649406a4d5a3b1d2178d /disk
parentc95c3ec025f46b6d65f87bc1010eae76c4152334 (diff)
mips: mtmips: rewrite lowlevel codes of mt7628
This patch rewrites the mtmips architecture with the following changes: 1. Move MT7628 soc parts into a subfolder. 2. Lock parts of D-Cache as temporary stack. 3. Reimplement DDR initialization in C language. 4. Reimplement DDR calibration in a clear logic. 5. Add full support for auto size detection for DDR1 and DDR2. 6. Use accurate CPU clock depending on the input xtal frequency for timer and delay functions. Note: print_cpuinfo() has incompatible parts with MT7620 so it's moved into mt7628 subfolder. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'disk')
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