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authorPeter Tyser2009-04-18 22:34:03 -0500
committerWolfgang Denk2009-06-12 20:39:46 +0200
commit0f89c54be92773b23d66ac401ba6acb6144100c3 (patch)
tree60f51c10ce10d8525fd635a1f99e76707221f4d0 /doc/README.ebony
parentd48eb5131d287f52bb85b4c58c8680a2e8e3b641 (diff)
i2c: Update references to individual i2c commands
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop, and isdram are no longer available so all references to them have been updated to the new form of "i2c <cmd>". Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'doc/README.ebony')
-rw-r--r--doc/README.ebony20
1 files changed, 10 insertions, 10 deletions
diff --git a/doc/README.ebony b/doc/README.ebony
index a395a499621..a8479a4799d 100644
--- a/doc/README.ebony
+++ b/doc/README.ebony
@@ -31,17 +31,17 @@ J42: open
All others are factory default.
-I2C iprobe
+I2C probe
=====================
The i2c utilities have been tested on both Rev B. and Rev C. and
look good. The CONFIG_SYS_I2C_NOPROBES macro is defined to prevent
probing the CDCV850 clock controller at address 0x69 (since reading
it causes the i2c implementation to misbehave. The output of
-iprobe should look like this (assuming you are only using a single
+'i2c probe' should look like this (assuming you are only using a single
SO-DIMM:
-=> iprobe
+=> i2c probe
Valid chip addresses: 50 53 54
Excluded chip addresses: 69
@@ -63,13 +63,13 @@ J42 - strapped
This will select the default sys0 and sys1 settings (the serial
eeproms are not used). Then power up the board and fix the serial
-eeprom using the imm command. Here are the values I currently
+eeprom using the 'i2c mm' command. Here are the values I currently
use:
-=> imd 50 0 10
+=> i2c md 50 0 10
0000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00 ................
-=> imd 54 0 10
+=> i2c md 54 0 10
0000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00 ..$.M...........
Once you have the eeproms set correctly change the
@@ -83,8 +83,8 @@ the SPD to initialize the DDR SDRAM control registers. So if the SPD
eeprom is corrupted, U-Boot will never get into ram. Here's how I got
out of this situation:
-0. First, _before_ playing with the i2c utilities, do an iprobe, then
-use imd to capture the various device contents to a file. Some day
+0. First, _before_ playing with the i2c utilities, do an 'i2c probe', then
+use 'i2c md' to capture the various device contents to a file. Some day
you may be glad you did this ... trust me :-). Otherwise try the
following:
@@ -100,12 +100,12 @@ settings without using the SPD eeprom.
3. Load the new U-Boot image and reboot ebony.
-4. Repair the SPD eeprom using the imm command. Here's the eeprom
+4. Repair the SPD eeprom using the 'i2c mm' command. Here's the eeprom
contents that work with the default SO-DIMM that comes with the
ebony board (micron 8VDDT164AG-265A1). Note: these are probably
_not_ the factory settings ... but they work.
-=> imd 53 0 10 80
+=> i2c md 53 0 10 80
0000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01 ......@..uu.....
0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20 ..... ..u..P<P-
0020: 90 90 50 50 00 00 00 00 00 41 4b 34 32 75 00 00 ..PP.....AK42u..