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authorCaleb Connolly2024-06-17 10:03:49 +0200
committerTom Rini2024-06-25 17:22:30 -0600
commit9bd7fdd539e048925866cfc76e662c97f4dc802d (patch)
treeb1343460bcfbd9e8d19b6167bc5c349d7c001f13 /doc/arch
parent7ff2dfb6040160d21469cef19af705cdbf7c7353 (diff)
doc: arch: arm64: describe pagetable debugging
Add some brief documentation on using dump_pagetables() to print out U-Boot's pagetables during boot. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'doc/arch')
-rw-r--r--doc/arch/arm64.rst49
1 files changed, 49 insertions, 0 deletions
diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst
index 7c0713504c4..19662be6fc6 100644
--- a/doc/arch/arm64.rst
+++ b/doc/arch/arm64.rst
@@ -48,6 +48,55 @@ Notes
6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and
aarch32 specific codes.
+MMU
+---
+
+U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits
+possible for the virtual address based on the maximum memory address (see the logic
+in ``get_tcr()``). If this is less than 39 bits, the MMU will use only 3 levels for
+address translation.
+
+As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses.
+In general, the memory map is expected to remain static once the MMU is enabled.
+
+Software pagetable walker
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+It is possible to debug the pagetable generated by U-Boot with the built in
+``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple
+wrapper for the latter). For example the following can be added to ``setup_all_pgtables()``
+after the first call to ``setup_pgtables()``:
+
+.. code-block:: c
+
+ dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
+
+.. kernel-doc:: arch/arm/cpu/armv8/cache_v8.c
+ :identifiers: __pagetable_walk pagetable_print_entry
+
+The pagetable walker can be used as follows:
+
+.. kernel-doc:: arch/arm/include/asm/armv8/mmu.h
+ :identifiers: pte_walker_cb_t walk_pagetable dump_pagetable
+
+This will result in a print like the following:
+
+.. code-block:: text
+
+ Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
+ [0x17df91000] | Table | |
+ [0x17df92000] | Table | |
+ [0x000001000 - 0x000200000] | Pages | Device-nGnRnE | Non-shareable
+ [0x000200000 - 0x040000000] | Block | Device-nGnRnE | Non-shareable
+ [0x040000000 - 0x080000000] | Block | Device-nGnRnE | Non-shareable
+ [0x080000000 - 0x140000000] | Block | Normal | Inner-shareable
+ [0x17df93000] | Table | |
+ [0x140000000 - 0x17de00000] | Block | Normal | Inner-shareable
+ [0x17df94000] | Table | |
+ [0x17de00000 - 0x17dfa0000] | Pages | Normal | Inner-shareable
+
+For more information, please refer to the additional function documentation in
+``arch/arm/include/asm/armv8/mmu.h``.
Contributors
------------