aboutsummaryrefslogtreecommitdiff
path: root/doc/board/coreboot
diff options
context:
space:
mode:
authorSimon Glass2023-08-11 12:17:43 -0600
committerTom Rini2023-08-17 12:29:21 -0400
commitc60e6a24dd432fa5975cdd9077cfbdbe34e0a588 (patch)
tree4d93a35598c455f548ff327afe0381eed13a1613 /doc/board/coreboot
parent0d9a1262bb0aad6f5a93ec081eb7c4873d6a5226 (diff)
CI: x86: coreboot: Update to latest coreboot
Use a recent coreboot build for this test. The coreboot commit is: 6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings This is build with default settings, i.e. QEMU x86 i440fx/piix4 Add some documentation as to how to update it next time. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/board/coreboot')
-rw-r--r--doc/board/coreboot/coreboot.rst20
1 files changed, 20 insertions, 0 deletions
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 21801a8a4d9..d660a223d9c 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -134,3 +134,23 @@ input clock is 1843200. So you can add the following CONFIG options::
CONFIG_DEBUG_UART_CLOCK=1843200
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
+
+coreboot in CI
+--------------
+
+CI runs tests using a pre-built coreboot image. This ensures that U-Boot can
+boot as a coreboot payload, based on a known-good build of coreboot.
+
+To update the `coreboot.rom` file which is used:
+
+#. Build coreboot with `CONFIG_LINEAR_FRAMEBUFFER=y`. If using `make menuconfig`
+ this is under
+ `Devices ->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
+
+#. Compress the resulting `coreboot.rom`::
+
+ xz -c /path/to/coreboot/build/coreboot.rom >coreboot.rom.xz
+
+#. Upload the file to Google drive
+
+#. Send a patch to change the file ID used by wget in the CI yaml files.