diff options
| author | Jit Loon Lim | 2023-08-04 10:28:39 +0800 |
|---|---|---|
| committer | Heinrich Schuchardt | 2023-08-09 08:41:52 +0200 |
| commit | b8531ac4d11b274c50803f90a0ffc5a9064f9836 (patch) | |
| tree | 6ed4d39d21a6d9c12b776ff7634c1b0717f1678e /doc/device-tree-bindings | |
| parent | effe50854a6964b6cf0f30e2716bec052a770d10 (diff) | |
doc: Add the link for the documentation of the .its
Provide the link for the .its related documentation for Arria10.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt index da210bfc86b..1381bdcd164 100644 --- a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt @@ -41,3 +41,6 @@ Example: Bundles both peripheral bitstream and core bitstream into FIT image resets = <&rst FPGAMGR_RESET>; altr,bitstream = "fit_spl_fpga.itb"; }; + +- The .its related documentations can be found here + - Appendix - Reducing Arria 10 Fabric Configuration Time - https://rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10 |