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authorPatrice Chotard2017-09-13 18:00:07 +0200
committerTom Rini2017-09-22 07:40:01 -0400
commit23a06416858d839ee62dc00562be956be6d84bd2 (patch)
tree3f8dafb28f143f6aa391ef7cc24b4ea5206fb529 /doc
parent4c3aebd56a035740f04fce44ce6c398afbb5ad86 (diff)
dm: reset: add stm32 reset driver
This driver is adapted from linux drivers/reset/reset-stm32.c It's compatible with STM32 F4/F7/H7 SoCs. This driver doesn't implement .of_match as it's binded by MFD RCC driver. To add support for each SoC family, a SoC's specific include/dt-binfings/mfd/stm32xx-rcc.h file must be added. This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs. Other SoCs support will be added in the future. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc')
-rw-r--r--doc/device-tree-bindings/reset/st,stm32-rcc.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/reset/st,stm32-rcc.txt b/doc/device-tree-bindings/reset/st,stm32-rcc.txt
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index 00000000000..01db3437519
--- /dev/null
+++ b/doc/device-tree-bindings/reset/st,stm32-rcc.txt
@@ -0,0 +1,6 @@
+STMicroelectronics STM32 Peripheral Reset Controller
+====================================================
+
+The RCC IP is both a reset and a clock controller.
+
+Please see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt