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| author | Tom Rini | 2022-04-20 14:33:53 -0400 |
|---|---|---|
| committer | Tom Rini | 2022-04-20 14:33:53 -0400 |
| commit | e2743c2aa0390f9590c13197cfee288a11b88dc0 (patch) | |
| tree | 127dc4d0079353e6f5cb7df708bfc5bc5f348bb5 /doc | |
| parent | 246e03476ba325051600017b552460d7f37c3191 (diff) | |
| parent | dd2b8c1155d016800cbbaa1bd70efdd81f9da493 (diff) | |
Merge branch '2022-04-20-assorted-improvements'
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
move TI am33xx to use that as well, fix DT relocation with multiple
DRAM banks, and add a gpio read sub-command.
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt index df3290a6b9d..1ea0a701143 100644 --- a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt +++ b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt @@ -39,6 +39,8 @@ Optional properties: - reg: Must add "ss" to list if the above ss region is included. - ti,ecc-enable: Boolean flag to enable ECC. This will reduce available DDR by 1/9. +- ti,ddr-freq0: Initial frequency set point, if not provided PLL bypass + frequency will be used. Example (J721E): ================ |