dm: treewide: Rename ..._platdata variables to just ..._plat

Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>

1 files changed, 25 insertions, 25 deletions

diff --git a/drivers/clk/at91/compat.c b/drivers/clk/at91/compat.c
index 89283e6e36c..e514f26656e 100644
--- a/drivers/clk/at91/compat.c
+++ b/drivers/clk/at91/compat.c
@@ -21,7 +21,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct pmc_platdata {
+struct pmc_plat {
 	struct at91_pmc *reg_base;
 	struct regmap *regmap_sfr;
 };
@@ -45,7 +45,7 @@ U_BOOT_DRIVER(at91_pmc) = {
 
 static int at91_pmc_core_probe(struct udevice *dev)
 {
-	struct pmc_platdata *plat = dev_get_plat(dev);
+	struct pmc_plat *plat = dev_get_plat(dev);
 
 	dev = dev_get_parent(dev);
 
@@ -115,7 +115,7 @@ int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
 int at91_clk_probe(struct udevice *dev)
 {
 	struct udevice *dev_periph_container, *dev_pmc;
-	struct pmc_platdata *plat = dev_get_plat(dev);
+	struct pmc_plat *plat = dev_get_plat(dev);
 
 	dev_periph_container = dev_get_parent(dev);
 	dev_pmc = dev_get_parent(dev_periph_container);
@@ -191,7 +191,7 @@ U_BOOT_DRIVER(at91_master_clk) = {
 /* Main osc clock specific code. */
 static int main_osc_clk_enable(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 
 	if (readl(&pmc->sr) & AT91_PMC_MOSCSELS)
@@ -225,14 +225,14 @@ U_BOOT_DRIVER(at91sam9x5_main_osc_clk) = {
 	.id = UCLASS_CLK,
 	.of_match = main_osc_clk_match,
 	.probe = main_osc_clk_probe,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &main_osc_clk_ops,
 };
 
 /* PLLA clock specific code. */
 static int plla_clk_enable(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 
 	if (readl(&pmc->sr) & AT91_PMC_LOCKA)
@@ -266,7 +266,7 @@ U_BOOT_DRIVER(at91_plla_clk) = {
 	.id = UCLASS_CLK,
 	.of_match = plla_clk_match,
 	.probe = plla_clk_probe,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &plla_clk_ops,
 };
 
@@ -278,7 +278,7 @@ static int at91_plladiv_clk_enable(struct clk *clk)
 
 static ulong at91_plladiv_clk_get_rate(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct clk source;
 	ulong clk_rate;
@@ -297,7 +297,7 @@ static ulong at91_plladiv_clk_get_rate(struct clk *clk)
 
 static ulong at91_plladiv_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct clk source;
 	ulong parent_rate;
@@ -340,7 +340,7 @@ U_BOOT_DRIVER(at91_plladiv_clk) = {
 	.id = UCLASS_CLK,
 	.of_match = at91_plladiv_clk_match,
 	.probe = at91_plladiv_clk_probe,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &at91_plladiv_clk_ops,
 };
 
@@ -401,7 +401,7 @@ static ulong system_clk_set_rate(struct clk *clk, ulong rate)
 
 static int system_clk_enable(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	u32 mask;
 
@@ -437,7 +437,7 @@ U_BOOT_DRIVER(system_clk) = {
 	.name = "system-clk",
 	.id = UCLASS_CLK,
 	.probe = at91_clk_probe,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &system_clk_ops,
 };
 
@@ -483,7 +483,7 @@ U_BOOT_DRIVER(sam9x5_periph_clk) = {
 
 static int periph_clk_enable(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	enum periph_clk_type clk_type;
 	void *addr;
@@ -536,7 +536,7 @@ static struct clk_ops periph_clk_ops = {
 U_BOOT_DRIVER(clk_periph) = {
 	.name	= "periph-clk",
 	.id	= UCLASS_CLK,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.probe = at91_clk_probe,
 	.ops	= &periph_clk_ops,
 };
@@ -552,7 +552,7 @@ U_BOOT_DRIVER(clk_periph) = {
 
 static int utmi_clk_enable(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct clk clk_dev;
 	ulong clk_rate;
@@ -640,7 +640,7 @@ static struct clk_ops utmi_clk_ops = {
 
 static int utmi_clk_of_to_plat(struct udevice *dev)
 {
-	struct pmc_platdata *plat = dev_get_plat(dev);
+	struct pmc_plat *plat = dev_get_plat(dev);
 	struct udevice *syscon;
 
 	uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
@@ -668,7 +668,7 @@ U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
 	.of_match = utmi_clk_match,
 	.probe = utmi_clk_probe,
 	.of_to_plat = utmi_clk_of_to_plat,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &utmi_clk_ops,
 };
 
@@ -681,7 +681,7 @@ U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
 
 static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	ulong rate = gd->arch.mck_rate_hz;
 
@@ -713,7 +713,7 @@ U_BOOT_DRIVER(sama5d4_h32mx_clk) = {
 	.id = UCLASS_CLK,
 	.of_match = sama5d4_h32mx_clk_match,
 	.probe = sama5d4_h32mx_clk_probe,
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &sama5d4_h32mx_clk_ops,
 };
 
@@ -754,7 +754,7 @@ struct generic_clk_priv {
 
 static ulong generic_clk_get_rate(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct clk parent;
 	ulong clk_rate;
@@ -782,7 +782,7 @@ static ulong generic_clk_get_rate(struct clk *clk)
 
 static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct generic_clk_priv *priv = dev_get_priv(clk->dev);
 	struct clk parent, best_parent;
@@ -877,7 +877,7 @@ U_BOOT_DRIVER(generic_clk) = {
 	.probe = at91_clk_probe,
 	.of_to_plat = generic_clk_of_to_plat,
 	.priv_auto	= sizeof(struct generic_clk_priv),
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &generic_clk_ops,
 };
 
@@ -895,7 +895,7 @@ struct at91_usb_clk_priv {
 
 static ulong at91_usb_clk_get_rate(struct clk *clk)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct clk source;
 	u32 tmp, usbdiv;
@@ -916,7 +916,7 @@ static ulong at91_usb_clk_get_rate(struct clk *clk)
 
 static ulong at91_usb_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct pmc_platdata *plat = dev_get_plat(clk->dev);
+	struct pmc_plat *plat = dev_get_plat(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
 	struct at91_usb_clk_priv *priv = dev_get_priv(clk->dev);
 	struct clk source, best_source;
@@ -1013,7 +1013,7 @@ U_BOOT_DRIVER(at91_usb_clk) = {
 	.probe = at91_usb_clk_probe,
 	.of_to_plat = at91_usb_clk_of_to_plat,
 	.priv_auto	= sizeof(struct at91_usb_clk_priv),
-	.plat_auto	= sizeof(struct pmc_platdata),
+	.plat_auto	= sizeof(struct pmc_plat),
 	.ops = &at91_usb_clk_ops,
 };