diff options
| author | Eugeniy Paltsev | 2020-04-16 22:35:11 +0300 |
|---|---|---|
| committer | Alexey Brodkin | 2020-04-16 23:37:10 +0300 |
| commit | 7b50db8242b62c85a19da9521b703faa858f4a63 (patch) | |
| tree | f095982dd42ec523bd5f9afca93ba4619440c1c4 /drivers/clk/clk_zynqmp.c | |
| parent | a6a0b0244bdded02d69e6493219a88ffd0c79bc8 (diff) | |
ARC: HSDK: CGU: fix tunnel clock calculation
We set wrong tunnel PLL frequency when we request 125MHz tunnel clock.
Fix that.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'drivers/clk/clk_zynqmp.c')
0 files changed, 0 insertions, 0 deletions