diff options
| author | Caleb Connolly | 2023-11-07 12:41:03 +0000 |
|---|---|---|
| committer | Caleb Connolly | 2024-01-16 12:26:24 +0000 |
| commit | 37ea1343ac92e614d40279273e35920a4827c310 (patch) | |
| tree | cfd44739bba6bc6f7e8ecd61ba97e42ae9132104 /drivers/clk/qcom/clock-ipq4019.c | |
| parent | 0e7fec02ce49556da2f045a8d04c69f2ae9fbd93 (diff) | |
clk/qcom: use function pointers for enable and set_rate
Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.
Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.
Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
[caleb: remove additional sysmap-sdm845.h mention]
Diffstat (limited to 'drivers/clk/qcom/clock-ipq4019.c')
| -rw-r--r-- | drivers/clk/qcom/clock-ipq4019.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c index db869f87421..d693776d339 100644 --- a/drivers/clk/qcom/clock-ipq4019.c +++ b/drivers/clk/qcom/clock-ipq4019.c @@ -16,7 +16,7 @@ #include "clock-qcom.h" -ulong msm_set_rate(struct clk *clk, ulong rate) +static ulong ipq4019_clk_set_rate(struct clk *clk, ulong rate) { switch (clk->id) { case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/ @@ -27,7 +27,7 @@ ulong msm_set_rate(struct clk *clk, ulong rate) } } -int msm_enable(struct clk *clk) +static int ipq4019_clk_enable(struct clk *clk) { switch (clk->id) { case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/ @@ -123,7 +123,9 @@ static const struct qcom_reset_map gcc_ipq4019_resets[] = { [GCC_SPDM_BCR] = {0x25000, 0}, }; -static struct msm_clk_data ipq4019_data = { +static struct msm_clk_data ipq4019_clk_data = { + .enable = ipq4019_clk_enable, + .set_rate = ipq4019_clk_set_rate, .resets = gcc_ipq4019_resets, .num_resets = ARRAY_SIZE(gcc_ipq4019_resets), }; @@ -131,7 +133,7 @@ static struct msm_clk_data ipq4019_data = { static const struct udevice_id gcc_ipq4019_of_match[] = { { .compatible = "qcom,gcc-ipq4019", - .data = (ulong)&ipq4019_data, + .data = (ulong)&ipq4019_clk_data, }, { } }; |