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authorCaleb Connolly2024-02-26 17:26:39 +0000
committerCaleb Connolly2024-03-01 14:52:49 +0000
commit5566bb447647bc155d06fad852db4ba3006d9329 (patch)
treedf5d957c3726cb54408922191fc14104e89277e0 /drivers/clk/qcom
parent0d80f44c644aed766cc26fbb201e1c1a38bca924 (diff)
dts: dragonboard820c: use correct bindings for clocks
Don't use hardcoded clock IDs, use the IDs from the dt-bindings to be compatible with upstream. Taken from kernel tag v6.7 Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r--drivers/clk/qcom/clock-apq8096.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
index 1e6fdb5cd42..a4731613c5e 100644
--- a/drivers/clk/qcom/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -13,6 +13,7 @@
#include <errno.h>
#include <asm/io.h>
#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include "clock-qcom.h"
@@ -107,10 +108,10 @@ static ulong apq8096_clk_set_rate(struct clk *clk, ulong rate)
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
switch (clk->id) {
- case 0: /* SDC1 */
+ case GCC_SDCC1_APPS_CLK: /* SDC1 */
return clk_init_sdc(priv, rate);
break;
- case 4: /*UART2*/
+ case GCC_BLSP2_UART2_APPS_CLK: /*UART2*/
return clk_init_uart(priv);
default:
return 0;